CS5460A-BSZ Cirrus Logic Inc, CS5460A-BSZ Datasheet - Page 5

IC ENERGY METERING 1PHASE 24SSOP

CS5460A-BSZ

Manufacturer Part Number
CS5460A-BSZ
Description
IC ENERGY METERING 1PHASE 24SSOP
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5460A-BSZ

Package / Case
24-SSOP
Input Impedance
30 KOhm
Measurement Error
0.1%
Voltage - I/o High
0.8V
Voltage - I/o Low
0.2V
Current - Supply
2.9mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Meter Type
Single Phase
Output Voltage Range
2.4 V to 2.6 V
Output Current
1 uA
Input Voltage Range
2.4 V to 2.6 V
Input Current
25 nA
Power Dissipation
500 mW
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Ic Function
Single Phase Bi-directional Power / Energy IC
Brief Features
On-Chip Functions, AC Or DC System Calibration, Power Supply Monitor
Supply Voltage Range
3.3V To 5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CDB5460AU - EVALUATION BOARD FOR CS5460A
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1094-5

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1. CHARACTERISTICS & SPECIFICATIONS
ANALOG CHARACTERISTICS
(T
K = 1; N = 4000 ==> OWR = 4000 Sps.)(See Notes 1, 2, 3, 4, and 5.)
Notes:
DS487F4
Accuracy (Both Channels)
Common Mode Rejection
Offset Drift (Without the High Pass Filter)
Analog Inputs (Current Channel)
Maximum Differential Input Voltage Range
{(V
Total Harmonic Distortion
Common Mode + Signal on IIN+ or IIN-
Crosstalk with Voltage Channel at Full Scale
Input Capacitance
Effective Input Impedance
Noise (Referred to Input)
Accuracy (Current Channel)
Bipolar Offset Error
Full-Scale Error
Analog Inputs (Voltage Channel)
Maximum Differential Input Voltage Range
Total Harmonic Distortion
Common Mode + Signal on VIN+ or VIN-
Crosstalk with Current Channel at Full Scale
Input Capacitance
Effective Input Impedance
Noise (Referred to Input)
Accuracy (Voltage Channel)
Bipolar Offset Error
Full-Scale Error
A
IIN+
= -40 °C to +85 °C; VA+ = VD+ = +5 V ±10%; VREFIN = +2.5 V; VA- = AGND = 0 V; MCLK = 4.096 MHz,
) - (V
1. Bipolar Offset Errors and Full-Scale Gain Errors for the current and voltage channels refer to the respective Irms
2. Specifications guaranteed by design, characterization, and/or test.
3. Analog signals are relative to VA- and digital signals to DGND unless otherwise noted.
4. In requiring VA+ = VD+ =5 V ±10%, note that it is allowable for VA+, VD+ to differ by as much as ±200 mV, as long
5. Note that “Sps” is an abbreviation for units of “samples per second”.
6. Effective Input Impedance (Zin) is determined by clock frequency (DCLK) and Input Capacitance (IC).
IIN-
Register and Vrms Register output, when the device is operating in ‘continuous computation cycles’ data acquisition
mode, after offset/gain system calibration sequences have been executed. These specs do not apply to the error
of the Instantaneous Current/Voltage Register output.
as VA+ > VD+.
Zin = 1/(IC*DCLK/4). Note that DCLK = MCLK / K.
)}
Parameter
(Gain = 10 or 50)
{(V
(DC, 50, 60 Hz)
VIN+
(Gain = 10)
(Gain = 50)
(Gain = 10)
(Gain = 50)
(Gain = 10)
(Gain = 50)
(Gain = 10)
(Gain = 50)
(50, 60 Hz)
(50, 60 Hz)
) - (V
(Note 6)
(Note 1)
(Note 1)
(Note 6)
(Note 1)
(Note 1)
VIN-
)}
Symbol
CMRR
THD
VOS
FSE
THD
VOS
FSE
C
Z
V
C
Z
Z
I
IN
inV
inV
inI
inI
IN
in
V
V
V
I
I
I
-0.25
Min
VA-
80
80
62
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
±0.001
±0.001
±0.01
±0.01
Typ
0.2
25
25
30
30
5
5
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
VA+
-115
VA+
500
100
500
250
CS5460A
-70
20
4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
mV
mV
mV
nV/°C
%F.S.
%F.S.
%F.S.
%F.S.
µV
µV
µV
Unit
MΩ
kΩ
kΩ
dB
dB
dB
pF
pF
dB
dB
pF
V
V
rms
rms
rms
P-P
P-P
P-P
5

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