MAX16070ETL+ Maxim Integrated Products, MAX16070ETL+ Datasheet
MAX16070ETL+
Specifications of MAX16070ETL+
Related parts for MAX16070ETL+
MAX16070ETL+ Summary of contents
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... SMBus (with Timeout) or JTAG Interface S Flash Configurable Time Delays and Thresholds S -40NC to +85NC Operating Temperature Range S Ordering Information PART TEMP RANGE MAX16070ETL+ -40NC to +85NC MAX16071ETL+ -40NC to +85NC +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. Pin Configuration and Typical Operating Circuits appear at end of data sheet. Features ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers ABSOLUTE MAXIMUM RATINGS V , CSP, CSM to GND ........................................-0.3V to +15V CC CSP to CSM ..........................................................-0.7V to +0.7V MON_, GPIO_, SCL, SDA, A0, RESET to GND (programmed as open-drain outputs) .................-0.3V ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers ELECTRICAL CHARACTERISTICS (continued 2.8V to 14V -40NC to +85NC, unless otherwise specified. Typical values are (Note 1) PARAMETER SYMBOL ADC DC ACCURACY Resolution Gain ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers ELECTRICAL CHARACTERISTICS (continued 2.8V to 14V -40NC to +85NC, unless otherwise specified. Typical values are (Note 1) PARAMETER SYMBOL OUTPUTS (RESET, GPIO_) Output-Voltage Low ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers ELECTRICAL CHARACTERISTICS (continued 2.8V to 14V -40NC to +85NC, unless otherwise specified. Typical values are (Note 1) PARAMETER SYMBOL Output Fall Time Data Hold ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers SDA t SU:DAT t LOW SCL t HIGH t HD:STA START CONDITION Figure 1. SMBus Timing Diagram TCK TDI, TMS TDO Figure 2. JTAG ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers (Typical values are 3.3V +25°C, unless otherwise noted SUPPLY CURRENT CC vs. V SUPPLY VOLTAGE CC 6 ABP AND DBP CONNECTED ...
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Flash-Configurable System Monitors with Nonvolatile Fault Registers (Typical values are 3.3V +25°C, unless otherwise noted INTEGRAL NONLINEARITY vs. CODE 1.0 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 128 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers PIN NAME MAX16070 MAX16071 MON2–MON6, 1–5, 34, 35, 1–5, 37, 38, MON7, MON8 MON1 RESET ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers MAX16070 MAX16071 EN 1.4V CSP A V CSM VOLTAGE MON1– SCALING MON12 AND MUX SMBus INTERFACE AO SCL SDA 10 _____________________________________________________________________________________ V ABP DBP CC V CSTH REF 10-BIT ADC ADC (SAR) ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Detailed Description The MAX16070 monitors up to twelve system power sup- plies and the MAX16071 can monitor up to eight system power supplies. After boot-up high and the soft- ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers When in the monitoring state, a register bit, ENRESET, is set to a ‘1’ when EN falls below the undervoltage threshold. This register bit latches and must be cleared through software. This ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Once EN is above its threshold and the software-enable bit is set, a boot-up delay occurs before monitoring begins. This delay is configured in register r77h[3:0] as shown in Tables 2 and ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 4. Overcurrent Primary Threshold and Current-Sense Control REGISTER FLASH ADDRESS ADDRESS 47h 247h 73h 273h Table 5. ADC Configuration Registers FLASH REGISTER ADDRESS ADDRESS 43h 243h 14 _____________________________________________________________________________________ BIT RANGE 1 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 5. ADC Configuration Registers (continued) FLASH REGISTER ADDRESS ADDRESS 44h 244h 45h 245h ______________________________________________________________________________________ BIT RANGE ADC5 full-scale range 00 = 5.6V [ ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 5. ADC Configuration Registers (continued) FLASH REGISTER ADDRESS ADDRESS 46h 246h 16 _____________________________________________________________________________________ BIT RANGE Differential conversion ADC1, ADC2 [ Disabled 1 = Enabled Differential conversion ADC3, ADC4 [1] ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 6. ADC Conversion Results (Read Only) REGISTER ADDRESS 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h 14h 15h 16h ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers General-Purpose Inputs/Outputs GPIO1 to GPIO8 are programmable general-purpose inputs/outputs. GPIO1–GPIO8 are configurable as a manual reset input, a watchdog timer input and output, logic inputs/outputs, fault-dependent outputs. When pro- grammed as outputs, ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 8. GPIO_ Configuration Registers (continued) REGISTER FLASH ADDRESS ADDRESS 42h 242h Table 9. GPIO_ Function Configuration Bits CODE GPIO1 GPIO2 Logic 000 Logic input input Logic 001 Logic output output Fault2 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers GPIO1 to GPIO8 are configurable as dedicated fault out- puts, Fault1 or Fault2. Fault outputs can assert on one or more overvoltage, undervoltage, or early warning condi- tions for selected inputs, as ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 10. Fault1 and Fault2 Dependencies (continued) REGISTER FLASH ADDRESS ADDRESS 39h 239h 3Ah 23Ah GPIO1, GPIO3, GPIO4, GPIO5, and GPIO7 are configu- rable to assert low during any fault condition. Overcurrent ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 11. Fault Threshold Registers REGISTER FLASH BIT RANGE ADDRESS ADDRESS 48h 248h 49h 249h 4Ah 24Ah 4Bh 24Bh 4Ch 24Ch 4Dh 24Dh 4Eh 24Eh 4Fh 24Fh 50h 250h 51h 251h 52h ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers The general-purpose inputs/outputs (GPIO1 to GPIO8) can be configured as ANY_FAULT outputs or dedicated Fault1 and Fault2 outputs to indicate fault conditions. These fault outputs are not masked by the critical fault ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 14. Critical Fault Configuration REGISTER FLASH BIT ADDRESS ADDRESS RANGE [1:0] 6Dh 26Dh [2] [7:3] [0] [1] [2] [3] 6Eh 26Eh [4] [5] [6] [7] [0] [1] [2] [3] 6Fh 26Fh ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 14. Critical Fault Configuration (continued) REGISTER FLASH BIT ADDRESS ADDRESS RANGE [0] [1] [2] 72h 272h [3] [4] [5] [7: GPIO_ is configured as an open-drain EXTFAULT input/output, and ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 15. Nonvolatile Fault Log Registers (continued) FLASH ADDRESS BIT RANGE 203h [7:0] 204h [7:0] 205h [7:0] 206h [7:0] 207h [7:0] 208h [7:0] 209h [7:0] 20Ah [7:0] 20Bh [7:0] 20Ch [7:0] 20Dh ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 16. Reset Output Configuration REGISTER FLASH BIT RANGE ADDRESS ADDRESS 3Bh 23Bh 3Ch 23Ch 3Dh 23Dh ______________________________________________________________________________________ Reset output depends on Undervoltage threshold violations [1: Early warning ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 17. Watchdog Configuration REGISTER FLASH BIT RANGE ADDRESS ADDRESS 73h 273h 76h 276h The normal watchdog timeout period, t the first transition on WDI before the conclusion of the long startup ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers LAST MON_ WDI RESET Figure 5. Normal Watchdog Startup Sequence V CC < t WDI WDI < t < t WDI WDI WDO 0V Figure 6. Watchdog Timer Operation ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Independent Watchdog Timer Operation When r73h[4] is ‘1’ the watchdog timer operates in the independent mode. In the independent mode, the watchdog timer operates were a separate device. The ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers SDA SCL CHANGE OF DATA LINE STABLE, DATA ALLOWED DATA VALID Figure 8. Bit Transfer Each clock pulse transfers one data bit. The data on SDA must remain stable while SCL is ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers SCL SDA BY TRANSMITTER S SDA BY RECEIVER Figure 10. Acknowledge Table 19. SMBus Settings Register REGISTER FLASH ADDRESS ADDRESS 8Bh 28Bh Table 20. Setting the SMBus Slave Address ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Packet Error Checking (PEC) The MAX16070/MAX16071 feature a PEC mode that is useful for improving the reliability of the communication bus by detecting bit errors. By enabling PEC, an extra CRC-8 error ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Send Byte Format S ADDRESS R/W ACK COMMAND ACK 7 bits bits 0 Slave Address: Address Data Byte: Presets the internal of the slave on the serial address pointer ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers The receive byte protocol allows the master device to read the register content of the MAX16070/MAX16071 (see Figure 11). The flash or register address must be preset with a send byte or ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers The block write protocol (see Figure 11) allows the mas- ter device to write a block of data (1 byte to 16 bytes) to memory. Preload the destination address by a previous ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 22. SMBus Alert Configuration REGISTER FLASH ADDRESS ADDRESS 35h 235h 4) The master sends 8 bits of the block read com- mand code. 5) The slave asserts an ACK on the ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers TDI TMS TCK Figure 12. JTAG Block Diagram Test Access Port (TAP) Controller State Machine The TAP controller is a finite state machine that responds to the logic ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers TEST-LOGIC-RESET RUN-TEST/IDLE 0 Figure 13. Tap Controller State Diagram data register remains at its current value. On the rising edge of TCK, the controller goes to the shift-DR state ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Exit1-IR: A rising edge on TCK with TMS low puts the controller in the pause-IR state. If TMS is high on the rising edge of TCK, the controller enters the update-IR state. ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 25. 32-Bit User-Code Data MSB Don’t Care SMBus slave ID 00000000000000000 See Table 20 USERCODE: When the USERCODE instruction latches into the parallel instruction register, the user-code data register is selected. ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers The capacitor value depends on V required Use the following formula to cal- FAULT_SAVE culate the capacitor size )/(V FAULT_SAVE CC(MAX) IN where the capacitance ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Configuring the Device An evaluation kit and a graphical user interface (GUI) is available to create a custom configuration for the device. Refer to the MAX16070/MAX16071 evaluation kit for con- figuration. Cascading ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers FLASH REGISTER READ/ ADDRESS ADDRESS WRITE ADC VALUES, FAULT REGISTERS, GPIO_S AS INPUT PORTS–NOT IN FLASH — 000 R — 001 R — 002 R — 003 R — 004 R — ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers FLASH REGISTER READ/ ADDRESS ADDRESS WRITE GPIO AND OUTPUT DEPENDENCIES/CONFIGURATIONS 230 030 R/W 231 031 R/W 232 032 R/W 233 033 R/W 234 034 R/W 235 035 R/W 236 036 R/W 237 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers FLASH REGISTER READ/ ADDRESS ADDRESS WRITE 254 054 R/W 255 055 R/W 256 056 R/W 257 057 R/W 258 058 R/W 259 059 R/W 25A 05A R/W 25B 05B R/W 25C 05C ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers FLASH REGISTER READ/ ADDRESS ADDRESS WRITE 278 078 R/W 279 079 R/W 27A 07A R/W 27B 07B R/W 27C 07C R/W 27D 07D R/W MISCELLANEOUS 27E 07E R/W 27F 07F R/W 280 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers FLASH REGISTER READ/ ADDRESS ADDRESS WRITE USER FLASH 300 39F R/W 3A0 3AF — 3B0 3FF R/W V SUPPLY IN OUT DC-DC GND OUT IN DC-DC GND IN OUT DC-DC GND 48 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers V SUPPLY IN OUT DC-DC GND OUT IN DC-DC GND IN OUT DC-DC GND NOTE: MON = MON1, MON3, MON5, MON7, MON9, MON11 ODD MON = MON2, MON4, MON6, MON8, MON10, MON12 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers TOP VIEW 50 _____________________________________________________________________________________ ABP 32 GND 33 MON7 34 MON8 35 MAX16070 36 MON9 MON10 37 38 MON11 EP ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Chip Information PROCESS: BiCMOS ______________________________________________________________________________________ Package Information For the latest package outline information and land pat- terns www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates ...
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... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 52 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 2011 Maxim Integrated Products © ...