ISL8120CRZ Intersil, ISL8120CRZ Datasheet - Page 24

• Manufacturer Part Number: ISL8120CRZ
• Description: IC CTRLR PWM 2PHASE W/DVR 32-QFN
• Manufacturer: Intersil

Specifications of ISL8120CRZ

• Pwm Type: Voltage Mode
• Number Of Outputs: 2
• Frequency - Max: 1.5MHz
• Duty Cycle: 90%
• Voltage - Supply: 3 V ~ 22 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Frequency-max: 1.5MHz
• Rohs Compliant: YES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

While EN/FF is pulled to ground, a constant voltage (0.8V) is
fed into the ramp generator to maintain a minimum
peak-to-peak ramp.
Since the EN/FF pins are pulled down under fault conditions,
the pull-up resistor (R
than 5mA current from EN/FF pin. Essentially, the EN/FF
pins cannot be directly connected to VCC.
Soft-start
The ISL8120 has two independent digital soft-start circuitry
with fixed 1280 switching cycles. The soft-start time is
inversely proportional to the switching frequency and is
determined by the 1280-cycle digital counter. Refer to
Figure 7. The full soft-start time from 0V to 0.6V can be
estimated using Equation 1.
The ISL8120 has the ability to work under a pre-charged
output (see Figure 8). The output voltage would not be
yanked down during pre-charged start-up. If the pre-charged
output voltage is greater than the final target level but prior to
113% setpoint, the switching will not start until the output
voltage reduces to the target voltage and the first PWM
pulse is generated (see Figure 9). The maximum allowable
pre-charged level is 113%. If the pre-charged level is above
113% but below 120%, the output will hiccup between 113%
(LGATE turns on) and 87% (LGATE turns off) while EN/FF is
pulled low. If the pre-charged load voltage is above 120% of
the targeted output voltage, then the controller will be
latched off and not be able to power-up.
For above-target level pre-charged start-up, the output
voltage would not change until the end of the soft-start. If the
initial dip is below the UV level, the LGATE could be turned
off. In such an event, the body-diode drop of the low-side
FET will be sensed and could potentiality cause an OCP
event for r
t
SS
R
FIGURE 6. TYPICAL 4-PHASE WITH FAULT HANDSHAKE
UP
=
1280
------------ -
f
=
SW
--------------------------------------------------------- -
I
EN_HYS
DS(ON)
V
2-PHASE
ISL8120
EN_HYS
⋅
current sensing applications.
EN/FF1
EN/FF2
N
PHASE
UP
) should be scaled to sink no more
24
VIN
R
R
UP
DOWN
EN/FF1
EN/FF2
2-PHASE
ISL8120
(EQ. 1)
ISL8120
Power-Good
FIGURE 9. SOFT-START WITH VOUT BELOW OV BUT
PGOOD
FIGURE 10. POWER-GOOD THRESHOLD WINDOW
-100mV
VMON1, 2
-100mV
FIRST PWM PULSE
UV
FIGURE 8. SOFT-START WITH VOUT = UV
0.0V
FIGURE 7. SOFT-START WITH VOUT = 0V
FIRST PWM PULSE
ABOVE FINAL TARGET VOLTAGE
SS2_PERIOD
SS1_PERIOD
CHANNEL 1 UV/OV
CHANNEL 2 UV/OV
END OF SS1
END OF SS2
FIRST PWM PULSE
OR
AND
t
SS_DLY
SS Settling at VREF + 100mV
SS Settling at VREF + 100mV
VOUT TARGET VOLTAGE
VOUT
≈
PGOOD latch off after 120% OV
t
AND
----------- -
F
SS
384
SW
=
VOUT
OV = 113%
1280
------------ -
F
SW
V
+13%
+9%
-9%
-13%
PGOOD
+20%
REF
March 20, 2009
FN6641.0