ADP3211AMNR2G ON Semiconductor, ADP3211AMNR2G Datasheet - Page 27

• Manufacturer Part Number: ADP3211AMNR2G
• Description: IC CTLR BUCK 7BIT 2PHASE 32QFN
• Manufacturer: ON Semiconductor

Specifications of ADP3211AMNR2G

• Applications: Controller, Power Supplies for Next-Generation Intel Processors
• Voltage - Input: 3.3 ~ 22 V
• Number Of Outputs: 1
• Voltage - Output: 0.0125 ~ 1.5 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 32-TFQFN Exposed Pad
• Output Voltage: 1.1 V
• Output Current: 10 A
• Input Voltage: 19 V
• Supply Current: 6 mA
• Switching Frequency: 400 KHz
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

node when the high side MOSFET turns on. The switch
node ringing could cause EMI system failures and
increased stress on the power components and controller.
The RC snubber should be placed as close as possible to the
low side MOSFET. Typical values for the resistor range
from 1 W to 10 W. Typical values for the capacitor range
from 330 pF to 4.7 nF. The exact value of the RC snubber
depends on the PCB layout and MOSFET selection. Some
fine tuning must be done to find the best values. The
equation below is used to find the starting values for the RC
snubber.
Where R
C
f
when the high side MOSFET turns on.
C
This is taken from the low side MOSFET data sheet.
V
f
P
Current Monitor
pin sources a current proportional to the total inductor
current. A resistor, R
gain of the output current monitor. A 0.1 mF is placed in
parallel with R
high frequency load transients. Since the I
connected directly to the CPU, it is clamped to prevent it
from going above 1.15 V.
gain of 10. R
equation:
where:
R
from I
R
R
I
scale.
Feedback Loop Compensation Design
possible response of the regulator’s output to a load change.
The basis for determining the optimum compensation is to
make the regulator and output decoupling appear as an output
impedance that is entirely resistive over the widest possible
Ringing
Switching
FS
Snubber
Snubber
OSS
input
MON
LIM
O
The ADP3211 has an output current monitor. The I
The I
Optimized compensation of the ADP3211 allows the best
is the output current when the voltage on I
is the output load line resistance.
R
C
P
is the low side MOSFET output capacitance at V
is the current limit resistor.
Snubber
MON
is the input voltage.
Snubber
Snubber
is the current monitor resistor. R
MON
is the frequency of the ringing on the switch node
is the power dissipated in R
Snubber
is the snubber capacitor.
is the switching frequency.
pin to FBRTN.
pin current is equal to the R
+
+
+ C
MON
MON
2
is the snubber resistor.
p
R
Snubber
MON
to filter the inductor current ripple and
p
f
MON
can be found using the following
Ringing
+
f
Ringing
, from I
10
1.15 V
1
1
V
2
R
Input
R
Snubber
O
MON
C
R
OSS
Snubber
f
LIM
I
Switching
FS
to FBRTN sets the
MON
LIM
.
times a fixed
MON
is connected
MON
is at full
(eq. 27)
(eq. 28)
(eq. 29)
(eq. 30)
http://onsemi.com
pin is
Input
MON
.
27
frequency range, including dc, and that is equal to the droop
resistance (R
output voltage droops in proportion with the load current at
any load current slew rate, ensuring the optimal position and
allowing the minimization of the output decoupling.
ADP3211, it is necessary to set the feedback compensation
so that the converter’s output impedance works in parallel
with the output decoupling. In addition, it is necessary to
compensate for the several poles and zeros created by the
output inductor and decoupling capacitors (output filter).
adequate for proper compensation of the output filter.
Figure 35 shows the Type III amplifier used in the
ADP3211. Figure 36 shows the locations of the two poles
and two zeros created by this amplifier.
and zeros shown in Figure 36:
Figure 36. Poles and Zeros of Voltage Error Amplifier
With the multi−mode feedback structure of the
A Type III compensator on the voltage feedback is
The following equations give the locations of the poles
COMP
GAIN
VOLTAGE ERROR
AMPLIFIER
Figure 35. Voltage Error Amplifier
0dB
O
–20dB/DEC
f
f
f
f
). With the resistive output impedance, the
Z2
P1
P2
Z1
f
+
P1
+
+
+
R
A
2p
2p(C
2p
2p
C
FB
C
A
C
R
A
f
C
C
Z2
FB
) C
1
1
B
A
A
A
) C
1
f
Z1
FB
–20dB/DEC
R
R
C
)
ADP3211
B
FB
A
FB
C
R
REFERENCE
f
P2
B
B
VOLTAGE
R
B
C
A
FREQUENCY
VOLTAGE
OUTPUT
(eq. 31)
(eq. 32)
(eq. 33)
(eq. 34)