ADP3211AMNR2G ON Semiconductor, ADP3211AMNR2G Datasheet - Page 7

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ADP3211AMNR2G

Manufacturer Part Number
ADP3211AMNR2G
Description
IC CTLR BUCK 7BIT 2PHASE 32QFN
Manufacturer
ON Semiconductor
Datasheet

Specifications of ADP3211AMNR2G

Applications
Controller, Power Supplies for Next-Generation Intel Processors
Voltage - Input
3.3 ~ 22 V
Number Of Outputs
1
Voltage - Output
0.0125 ~ 1.5 V
Operating Temperature
-10°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
32-TFQFN Exposed Pad
Output Voltage
1.1 V
Output Current
10 A
Input Voltage
19 V
Supply Current
6 mA
Switching Frequency
400 KHz
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ELECTRICAL CHARACTERISTICS
T
CLKEN OUTPUT
1. All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
2. Guaranteed by design or bench characterization, not production tested.
PULSE WIDTH MODULATOR − Clock Oscillator
RAMP GENERATOR
PWM COMPARATOR
RPM COMPARATOR
SWITCH AMPLIFIER
ZERO CURRENT SWITCHING COMPARATOR
SYSTEM I/O BUFFERS − EN and VID[6:0] INPUTS
GPU INPUT
SUPPLY
R
PWM Clock Frequency
Range (Note 2)
RAMP Voltage
RAMP Current Range (Note 2)
PWM Comparator Offset
(Note 2)
RPM Current
RPM Comparator Offset
(Note 2)
SW Input Resistance
SW ZCS Threshold
Masked Off−Time
Input Voltage
Input Current
VID Delay Time (Note 2)
Input Voltage
Input Current
Output Low Voltage
Output High, Leakage Current
Supply Voltage Range
Supply Current
V
V
V
A
CC
CC
CC
T
= −40°C to 100°C, unless otherwise noted. (Note 1) Current entering a pin (sunk by the device) has a positive sign.
Voltage
OK Threshold
UVLO Threshold
Hysteresis (Note 2)
Parameter
V
I
t
EN,VID[6:0]
V
Symbol
V
V
V
OFFMSKD
EN,VID[6:0]
V
V
I
V
CCUVLO
I
OSRPM
OSRPM
V
CLKEN
ZCSSW
RAMP
I
R
I
CLKEN
V
f
RAMP
V
CCOK
RPM
GPU
CLK
GPU
SW
CC
RT
(V
CC
= PV
CC
R
See also V
Operation of interest
EN = H, I
EN = L
EN = H
EN = L, RAMP = 19 V
V
See also I
V
Measured from SW to PGND
DCM mode, DPRSLP = 3.3 V
Measured from DRVH neg edge to DRVH
pos edge at max frequency of operation
Refers to driving signal level
Logic low, I
Logic high, I
V
0.2 V < V
Any VID edge to 10% of FB change
Refers to driving signal level
Logic low, I
Logic high, I
GPU = L or GPU = H (static)
0.8 V < EN < 1.6 V (during transition)
Logic low, I
Logic high, V
EN = H
EN = L
V
V
VID
COMP
EN,VID[6:0]
CC
CC
T
= 5.0 V, FBRTN = GND = PGND = 0 V, H = 5.0 V, L = 0 V, V
= 243 kW, V
is rising
is falling
= 1.2 V, R
http://onsemi.com
− (1 + V
RAMP
EN,VID[6:0]
RPM
RT
sink
sink
CLKEN
source
= 0 V
source
CLKEN
(V
(R
T
= 1 mA
= 1 mA
VID
= 60 mA
VID
RPM
7
T
Conditions
= 243 kW
) formula
= −5 mA
= −5 mA
= 4 mA
) formula
= 1.2 V
)
≤ V
= V
CC
CC
1.08
−0.5
−3.0
−3.0
Min
200
0.3
0.9
1.0
0.7
4.0
4.5
4.0
−6.0
−4.0
4.15
Typ
700
150
V
1.2
1.0
1.3
1.0
6.0
4.4
10
10
70
30
60
IN
VID
= V
Max
1.35
+0.5
+3.0
+3.0
100
300
200
3.0
1.1
0.3
0.3
3.0
5.5
4.5
10
DAC
= 1.2 V,
Units
MHz
mV
mV
mV
mV
mA
mV
mA
mA
kW
nA
mA
nA
mA
mA
mA
ns
ns
V
V
V
V
V
V
V

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