ADP3211AMNR2G ON Semiconductor, ADP3211AMNR2G Datasheet - Page 4

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ADP3211AMNR2G

Manufacturer Part Number
ADP3211AMNR2G
Description
IC CTLR BUCK 7BIT 2PHASE 32QFN
Manufacturer
ON Semiconductor
Datasheet

Specifications of ADP3211AMNR2G

Applications
Controller, Power Supplies for Next-Generation Intel Processors
Voltage - Input
3.3 ~ 22 V
Number Of Outputs
1
Voltage - Output
0.0125 ~ 1.5 V
Operating Temperature
-10°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
32-TFQFN Exposed Pad
Output Voltage
1.1 V
Output Current
10 A
Input Voltage
19 V
Supply Current
6 mA
Switching Frequency
400 KHz
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PIN FUNCTION DESCRIPTIONS
Pin No.
25 to 31
10
12
13
14
15
16
17
18
19
20
21
22
23
24
32
11
1
2
3
4
5
6
7
8
9
VID6 to VID0
Mnemonic
CSCOMP
PWRGD
CLKEN
FBRTN
CSREF
COMP
RAMP
PGND
DRVH
LLINE
PVCC
IMON
CSFB
DRVL
IREF
RPM
GND
GPU
VCC
ILIM
BST
SW
EN
FB
RT
Clock Enable Output. Open drain output. The pull−high voltage on this pin cannot be higher than VCC.
Voltage Identification DAC Inputs. A 7−bit word (the VID Code) programs the DAC output voltage, the
reference voltage of the voltage error amplifier without a load (see the VID Code Table, Table NO TAG). In
normal operation mode, the VID DAC output programs the output voltage to a value within the 0 V to 1.5 V
range. The input is actively pulled down.
Power−Good Output. Open−drain output. A low logic state means that the output voltage is outside of the
VID DAC defined range.
Current Monitor Output. This pin sources current proportional to the output load current. A resistor connected
to FBRTN sets the current monitor gain.
Feedback Return Input/Output. This pin remotely senses the GMCH voltage. It is also used as the ground
return for the VID DAC and the voltage error amplifier blocks.
Voltage Error Amplifier Feedback Input. The inverting input of the voltage error amplifier.
Voltage Error Amplifier Output and Frequency Compensation Point.
GMCH/CPU select pin. Connect to ground when powering the CPU. Connect to 5.0 V when powering the
GMCH. When GPU is connected to ground, the boot voltage is 1.1 V for the ADP3211 and 1.2 V for the
ADP3211A. When GPU is connected to 5.0 V, there is no boot voltage.
Current Limit Set pin. Connect a resistor between ILIM and CSCOMP to the current limit threshold.
This pin sets the internal bias currents. A 80 kW is connected from IREF to ground.
RPM Mode Timing Control Input. A resistor is connected from RPM to ground sets the RPM mode turn−on
threshold voltage.
PWM Oscillator Frequency Setting Input. An external resistor from this pin to GND sets the PWM oscillator
frequency.
PWM Ramp Slope Setting Input. An external resistor from the converter input voltage node to this pin sets
the slope of the internal PWM stabilizing ramp.
Load Line Programming Input. The center point of a resistor divider connected between CSREF and
CSCOMP tied to this pin sets the load line slope.
Current Sense Reference Input. This pin must be connected to the opposite side of the output inductor.
Non−inverting Input of the Current Sense Amplifier. The combination of a resistor from the switch node to this
pin and the feedback network from this pin to the CSCOMP pin sets the gain of the current sense amplifier.
Current Sense Amplifier Output and Frequency Compensation Point.
Analog and Digital Signal Ground.
Low−Side Driver Power Ground. This pin should be connected close to the source of the lower MOSFET(s).
Low−Side Gate Drive Output.
Power Supply Input/Output of Low−Side Gate Driver.
Current Return For High−Side Gate Drive.
High−Side Gate Drive Output.
High−Side Bootstrap Supply. A capacitor from this pin to SW holds the bootstrapped voltage while the
high−side MOSFET is on.
Power Supply Input/Output of the Controller.
Enable Input. Driving this pin low shuts down the chip, disables the driver outputs, and pulls PWRGD low.
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Description

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