LTC3548EDD#TRPBF Linear Technology, LTC3548EDD#TRPBF Datasheet - Page 10

• Manufacturer Part Number: LTC3548EDD#TRPBF
• Description: IC DC/DC CONV DUAL 10-DFN
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC3548EDD#TRPBF

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.6 ~ 5 V
• Current - Output: 400mA, 800mA
• Frequency - Switching: 2.25MHz
• Voltage - Input: 2.5 ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

LTC3548
APPLICATIONS INFORMATION
stray capacitance to cause noise problems and reduce the
phase margin of the error amp loop.
To improve the frequency response, a feed-forward capaci-
tor C
route the V
inductor or the SW line.
Power-On Reset
The POR pin is an open-drain output which pulls low when
either regulator is out of regulation. When both output volt-
ages are above –8.5% of regulation, a timer is started which
releases POR after 2
delay can be signifi cantly longer in Burst Mode operation
with low load currents, since the clock cycles only occur
during a burst and there could be milliseconds of time
between bursts. This can be bypassed by tying the POR
output to the MODE/SYNC input, to force pulse-skipping
mode during a reset. In addition, if the output voltage faults
during Burst Mode sleep, POR could have a slight delay for
an undervoltage output condition. This can be avoided by
using pulse-skipping mode instead. When either channel
is shut down, the POR output is pulled low, since one or
both of the channels are not in regulation.
Mode Selection and Frequency Synchronization
The MODE/SYNC pin is a multipurpose pin which provides
mode selection and frequency synchronization. Connect-
ing this pin to V
provides the best low current effi ciency at the cost of a
higher output voltage ripple. Connecting this pin to ground
selects pulse-skipping mode, which provides the lowest
output ripple, at the cost of low current effi ciency.
The LTC3548 can also be synchronized to another LTC3548
by the MODE/SYNC pin. During synchronization, the mode
is set to pulse-skipping and the top switch turn-on is syn-
chronized to the rising edge of the external clock.
Checking Transient Response
The regulator loop response can be checked by look-
ing at the load transient response. Switching regulators
take several cycles to respond to a step in load current.
When a load step occurs, V
amount equal to ΔI
series resistance of C
10
F
may also be used. Great care should be taken to
FB
line away from noise sources, such as the
IN
enables Burst Mode operation, which
LOAD
18
OUT
clock cycles (about 117ms). This
• ESR, where ESR is the effective
. ΔI
OUT
LOAD
immediately shifts by an
also begins to charge
or discharge C
used by the regulator to return V
value. During this recovery time, V
for overshoot or ringing that would indicate a stability
problem.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second-
order overshoot/DC ratio cannot be used to determine
phase margin. In addition, a feed-forward capacitor, C
can be added to improve the high frequency response, as
shown in Figure 2. Capacitor C
creating a high frequency zero with R2, which improves
the phase margin.
The output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a re-
view of control loop theory, refer to Application Note 76.
In some applications, a more severe transient can be
caused by switching loads with large (>1μF) load input
capacitors. The discharged load input capacitors are ef-
fectively put in parallel with C
in V
prevent this problem, if the switch connecting the load
has low resistance and is driven quickly. The solution
is to limit the turn-on speed of the load switch driver. A
Hot Swap™ controller is designed specifi cally for this
purpose and usually incorporates current limiting, short-
circuit protection, and soft-starting.
Effi ciency Considerations
The percent effi ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the effi ciency and which change would
produce the most improvement. Percent effi ciency can
be expressed as:
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
Hot Swap is a trademark of Linear Technology Corporation.
% Effi ciency = 100% – (L1 + L2 + L3 + ...)
OUT
. No regulator can deliver enough current to
OUT
, generating a feedback error signal
OUT
F
provides phase lead by
OUT
, causing a rapid drop
OUT
to its steady-state
can be monitored
3548fc
F
,