IDT72P51369L5BB IDT, Integrated Device Technology Inc, IDT72P51369L5BB Datasheet - Page 31

IC FLOW CTRL 36BIT 256-BGA

IDT72P51369L5BB

Manufacturer Part Number
IDT72P51369L5BB
Description
IC FLOW CTRL 36BIT 256-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT72P51369L5BB

Configuration
Dual
Density
4.5Mb
Access Time (max)
3.6ns
Word Size
36b
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
BGA
Clock Freq (max)
200MHz
Supply Current
150mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72P51369L5BB

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT72P51369L5BB
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT72P51369L5BB8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
SWITCHING QUEUES ON THE READ PORT
trol devices can be configured up to a maximum of 8 queues. Data is read from
a queue using the Data Output (Qout) bus, Read Clock (RCLK) and Read
Enable (REN) signals. Selecting a queue on the read port occurs by placing
the queue address on the Read Address bus (RDADD) during a rising edge
trol device supports changing (switching) queues every four (4) clock cycles.
To switch from the Present Queue (PQ) to another queue requires a queue
address to be placed on the Read Address Bus (RDADD) bus and a rising edge
of Read Clock (RCLK) and Read Address Enable (RADEN) is HIGH. There
are no restrictions as to the order to which queues are selected or switched into
or out of.
NOTE:
PQ = Present Queue
NQ = Next Queue
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES
(8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592
The IDT72P51339/72P51349/72P51359/72P51369 multi-queue flow-con-
The IDT72P51339/72P51349/72P51359/72P51369 multi-queue flow-con-
RADEN
RCLK
Qout
REN
RDADD
RADEN
RCLK
PQ
Queue
address
Figure 10. Read Port Switching Queues Signal Sequence
QS-1
PQ
Queue Switch Cycles
Figure 11. Switching Queues Bus Efficiency
Queue Switch Cycle
QS0
PQ
QS1
PQ
31
of RCLK while Read Address Enable (RADEN) is HIGH. For reference, the
state of Read Enable (REN) is a “Don’t Care” during a read port queue selection.
REN has significance during the queue mark operation. Selecting a queue
requires 4 WCLK cycles. Refer to Figure 10, Read Port Switching Queues
Signal Sequence.
the IDT72P51339/72P51349/72P51359/72P51369 multi-queue flow-control
device can continue to read from the Present Queue (PQ). The Present Queue
is defined as the current selected queue. Refer to Figure 11, Switching Queues
Bus Efficiency.
For maximum efficiency, during the 4 clock cycles required to switch queues
QS2
PQ
Queue
address
QS3
NQ
NQ
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
6716 drw16
AUGUST 4, 2005
6716 drw17

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