EVAL-AD7689EDZ Analog Devices Inc, EVAL-AD7689EDZ Datasheet
EVAL-AD7689EDZ
Specifications of EVAL-AD7689EDZ
Related parts for EVAL-AD7689EDZ
EVAL-AD7689EDZ Summary of contents
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FEATURES 16-bit resolution with no missing codes 4-channel (AD7682)/8-channel (AD7689) multiplexer with choice of inputs Unipolar single-ended Differential (GND sense) Pseudobipolar Throughput: 250 kSPS INL: ±0.4 LSB typical, ±1.5 LSB maximum (±23 ppm or FSR) Dynamic range: 93.8 dB SINAD: ...
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... Added Channel Sequencer Section and Figure 39 ..................... 27 Changes to Read/Write Spanning Conversion Without a Busy Indicator Section and Figure 41 ................................................... 28 Changes to Read/Write Spanning Conversion with a Busy Indicator and Figure 43 ................................................................. 29 Changes to Evaluating AD7682/AD7689 Performance Section .............................................................................................. 30 Added Exposed Pad Notation to Outline Dimensions ............. 31 Changes to Ordering Guide .......................................................... 31 5/08—Revision 0: Initial Version Rev Page ...
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SPECIFICATIONS VDD = 2 5.5 V, VIO = 1 VDD, V Table 2. Parameter Conditions/Comments RESOLUTION ANALOG INPUT Voltage Range Unipolar mode Bipolar mode Absolute Input Voltage Positive input, unipolar and bipolar modes Negative or COM ...
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AD7682/AD7689 Parameter Conditions/Comments Total Harmonic Distortion kHz IN (THD) Spurious-Free Dynamic kHz IN Range Channel-to-Channel Crosstalk f = 100 kHz on IN adjacent channel(s) SAMPLING DYNAMICS −3 dB Input Bandwidth Full bandwidth ¼ Bandwidth ...
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VDD = 2 5.5 V, VIO = 1 VDD, V Table 3. Parameter Conditions/Comments INTERNAL REFERENCE REF Output Voltage 2 25°C 4.096 V, @ 25°C 1 REFIN Output Voltage 2 25°C 4.096 ...
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AD7682/AD7689 TIMING SPECIFICATIONS VDD = 4 5.5 V, VIO = 1 VDD, all specifications T Table 4. 1 Parameter Conversion Time: CNV Rising Edge to Data Available Acquisition Time Time Between Conversions Data Write/Read During Conversion ...
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VDD = 2 4.5 V, VIO = 1 VDD, all specifications T Table 5. 1 Parameter Conversion Time: CNV Rising Edge to Data Available Acquisition Time Time Between Conversions Data Write/Read During Conversion CNV Pulse Width ...
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AD7682/AD7689 ABSOLUTE MAXIMUM RATINGS Table 6. Parameter Rating Analog Inputs INx, 1 COM 1 GND − 0 VDD + 0 VDD ± 130 mA REF, REFIN GND − 0 VDD + 0.3 V Supply ...
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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS PIN 1 VDD 1 INDICATOR 15 VIO 14 SDO REF 2 AD7682 REFIN 3 13 SCK GND 4 12 DIN TOP VIEW GND 5 11 CNV (Not to Scale) NOTES CONNECT. ...
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AD7682/AD7689 AD7682 AD7689 Pin No. Mnemonic Mnemonic 14 SDO SDO 15 VIO VIO 16 IN0 IN0 17 NC IN1 18 IN1 IN2 19 NC IN3 21 Exposed Pad Exposed (EPAD) (EPAD) Pad (EPAD analog input, AI/O = ...
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TYPICAL PERFORMANCE CHARACTERISTICS VDD = VIO = 2 VDD, unless otherwise noted. REF 1.5 INL MAX = +0.34 LSB INL MIN = –0.44 LSB 1.0 0.5 ...
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AD7682/AD7689 100 VDD = 5V, –0.5dB REF VDD = 5V, –10dB REF V = VDD = 2.5V, –0.5dB REF VDD = 2.5V, –10dB REF ...
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V = VDD = 5V, –0.5dB REF –110 V = VDD = 2.5V, –0.5dB REF V = VDD = 2.5V, –10dB REF V = VDD = 5V, –10dB REF –120 0 50 100 150 FREQUENCY ...
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AD7682/AD7689 TERMINOLOGY Least Significant Bit (LSB) The LSB is the smallest increment that can be represented by a converter. For an analog-to-digital converter with N bits of resolution, the LSB expressed in volts is V (V) = REF LSB N ...
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THEORY OF OPERATION INx+ 32,768C REF GND 32,768C INx– OR COM OVERVIEW The AD7682/AD7689 are 4-channel/8-channel, 16-bit, charge redistribution successive approximation register (SAR) analog- to-digital converters (ADCs). These devices are capable of converting 250,000 samples per second (250 kSPS) and ...
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AD7682/AD7689 TRANSFER FUNCTIONS With the inputs configured for unipolar range (single-ended, COM with ground sense, or paired differentially with INx− as ground sense), the data output is straight binary. With the inputs configured for bipolar range (COM = V paired ...
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TYPICAL CONNECTION DIAGRAMS REF ADA4841 REF ADA4841 REF NOTES 1. INTERNAL REFERENCE SHOWN. SEE VOLTAGE REFERENCE OUTPUT/INPUT SECTION FOR REFERENCE SELECTION USUALLY A 10µF CERAMIC CAPACITOR (X5R). ...
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AD7682/AD7689 Unipolar or Bipolar Figure 26 shows an example of the recommended connection diagram for the AD7682/AD7689 when multiple supplies are available. Bipolar Single Supply Figure 27 shows an example of a system with a bipolar input using single supplies ...
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Input Configurations Figure 30 shows the different methods for configuring the analog inputs with the configuration register, CFG[12:10]. Refer to the Configuration Register, CFG, section for more details. The analog inputs can be configured as • Figure 30A, single-ended referenced ...
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AD7682/AD7689 DRIVER AMPLIFIER CHOICE Although the AD7682/AD7689 are easy to drive, the driver amplifier must meet the following requirements: • The noise generated by the driver amplifier must be kept as low as possible to preserve the SNR and transition ...
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External Reference and Internal Buffer For improved drift performance, an external reference can be used with the internal buffer, as shown in Figure 32. The external source is connected to REFIN, the input to the on-chip unity gain buffer, and ...
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AD7682/AD7689 POWER SUPPLY The AD7682/AD7689 use two power supply pins: an analog and digital core supply (VDD) and a digital input/output inter- face supply (VIO). VIO allows direct interface with any logic between 1.8 V and VDD. To reduce the ...
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DIGITAL INTERFACE The AD7682/AD7689 use a simple 4-wire interface and are compatible with SPI, MICROWIRE™, QSPI™, digital hosts, and DSPs, for example, Blackfin® ADSP-BF53x, SHARC®, ADSP-219x, and ADSP-218x. The interface uses the CNV, DIN, SCK, and SDO signals and allows ...
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AD7682/AD7689 The register can be written to during conversion, during acquisi- tion, or spanning acquisition/conversion, and is updated at the end of conversion, t (maximum). There is always a one deep CONV delay when writing the CFG register. Note that, ...
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GENERAL TIMING WITHOUT A BUSY INDICATOR Figure 37 details the timing for all three modes: read/write during conversion (RDC), read/write after conversion (RAC), and read/write spanning conversion (RSC). Note that the gating item for both CFG and data readback is ...
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AD7682/AD7689 GENERAL TIMING WITH A BUSY INDICATOR Figure 38 details the timing for all three modes: read/write during conversion (RDC), read/write after conversion (RAC), and read/write spanning conversion (RSC). Note that the gating item for both CFG and data readback ...
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CHANNEL SEQUENCER The AD7682/AD7689 include a channel sequencer useful for scanning channels in a repeated fashion. Channels are scanned as singles or pairs, with or without the temperature sensor, after the last channel is sequenced. The sequencer starts with IN0 ...
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AD7682/AD7689 READ/WRITE SPANNING CONVERSION WITHOUT A BUSY INDICATOR This mode is used when the AD7682/AD7689 are connected to any host using an SPI, serial port, or FPGA. The connection diagram is shown in Figure 40, and the corresponding timing is ...
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READ/WRITE SPANNING CONVERSION WITH A BUSY INDICATOR This mode is used when the AD7682/AD7689 are connected to any host using an SPI, serial port, or FPGA with an interrupt input. The connection diagram is shown in Figure 42, and the ...
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... EVALUATING AD7682/AD7689 PERFORMANCE Other recommended layouts for the AD7682/AD7689 are outlined in the documentation of the evaluation board for the AD7682/AD7689 (EVAL-AD7682EDZ/EVAL-AD7689EDZ). The evaluation board package includes a fully assembled and tested evaluation board, documentation, and software for controlling the board from a PC via the converter and evaluation development data capture board, EVAL-CED1Z ...
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... LSB max AD7689BCPZ 1 ±2 LSB max 1 AD7689BCPZRL7 ±2 LSB max EVAL-AD7682EDZ 1 1 EVAL-AD7689EDZ EVAL-CED1Z RoHS Compliant Part. 2 This controller board allows control and communicate with all Analog Devices evaluation boards whose model numbers end in ED. 0.60 MAX 4.00 BSC SQ 0.60 MAX ...
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AD7682/AD7689 NOTES ©2008–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07353-0-6/09(B) Rev Page ...