EVAL-AD7689EDZ Analog Devices Inc, EVAL-AD7689EDZ Datasheet - Page 28

• Manufacturer Part Number: EVAL-AD7689EDZ
• Description: BOARD EVAL AD7689
• Manufacturer: Analog Devices Inc
• Series: PulSAR®r

Specifications of EVAL-AD7689EDZ

• Number Of Adc's: 1
• Number Of Bits: 16
• Sampling Rate (per Second): 250k
• Data Interface: Serial
• Inputs Per Adc: 8 Single Ended
• Input Range: ±VREF
• Power (typ) @ Conditions: 12.5mW @ 250kSPS, 5 V
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD7689
• Silicon Manufacturer: Analog Devices
• Application Sub Type: ADC
• Kit Application Type: Data Converter
• Silicon Core Number: AD7689
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD7682/AD7689
READ/WRITE SPANNING CONVERSION WITHOUT
A BUSY INDICATOR
This mode is used when the AD7682/AD7689 are connected
to any host using an SPI, serial port, or FPGA. The connection
diagram is shown in Figure 40, and the corresponding timing
is given in Figure 41. For the SPI, the host should use CPHA =
CPOL = 0. Reading/writing spanning conversion is shown,
which covers all three modes detailed in the Digital Interface
section. For this mode, the host must generate the data transfer
based on the conversion time. For an interrupt driven transfer
that uses a busy indicator, refer to the Read/Write Spanning
Conversion with a Busy Indicator section.
A rising edge on CNV initiates a conversion, forces SDO to
high impedance, and ignores data present on DIN. After a
conversion is initiated, it continues until completion irrespec-
tive of the state of CNV. CNV must be returned high before the
safe data transfer time, t
conversion time, t
indicator.
After the conversion is complete, the AD7682/AD7689 enter
the acquisition phase and power-down. When the host brings
ACQUISITION
NOTES
1. THE LSB IS FOR CONVERSION RESULTS OR THE CONFIGURATION REGISTER CFG (n – 1) IF
15 SCK FALLING EDGES = LSB OF CONVERSION RESULTS.
29 SCK FALLING EDGES = LSB OF CONFIGURATION REGISTER.
ON THE 16TH OR 30TH SCK FALLING EDGE, SDO IS DRIVEN TO HIGH IMPENDANCE.
(n - 1)
CNV
SCK
SDO
DIN
CONV
t
DIS
t
SCKH
, to avoid generation of the busy signal
CONVERSION (n – 1)
t
DATA
SCKL
t
END DATA (n – 2)
EN
t
DATA
CFG
LSB
, and then held high beyond the
14
t
END CFG (n)
SCK
>
t
LSB + 1
t
CONV
15
X
CONV
Figure 41. Serial Interface Timing for the AD7682/AD7689 Without a Busy Indicator
Figure 40. Connection Diagram for the AD7682/AD7689 Without a Busy Indicator
16/
30
LSB
X
t
DIS
RETURN CNV HIGH
(QUIET
TIME)
FOR NO BUSY
UPDATE (n)
CFG/SDO
t
EOC
CYC
t
AD7682/
AD7689
CLSCK
t
EN
FOR SPI USE CPHA = 0, CPOL = 0.
CNV
SDO
SCK
DIN
MSB
CFG
MSB
Rev. B | Page 28 of 32
1
t
SDIN
BEGIN CFG (n + 1)
BEGIN DATA (n – 1)
MSB – 1
MSB – 1
CFG
2
ACQUISITION (n)
t
ACQ
t
HDIN
CNV low after t
The host also must enable the MSB of the CFG register at this
time (if necessary) to begin the CFG update. While CNV is low,
both a CFG update and a data readback take place. The first 14
SCK rising edges are used to update the CFG, and the first 15
SCK falling edges clock out the conversion results starting with
MSB − 1. The restriction for both configuring and reading is
that they both must occur before the t
sion elapses. All 14 bits of CFG[13:0] must be written, or they
are ignored. In addition, if the 16-bit conversion result is not
read back before t
The SDO data is valid on both SCK edges. Although the rising
edge can be used to capture the data, a digital host using the
SCK falling edge allows a faster reading rate, provided it has an
acceptable hold time. After the 16
when CNV goes high (whichever occurs first), SDO returns to
high impedance.
If CFG readback is enabled, the CFG register associated with the
conversion result is read back MSB first following the LSB of the
conversion result. A total of 30 SCK falling edges is required to
return SDO to high impedance if this is enabled.
SS
MISO
MOSI
SCK
DIGITAL HOST
t
t
HSDO
DSDO
t
CONV
t
CNVH
EN
DATA
t
DIS
(maximum), the MSB is enabled on SDO.
elapses, it is lost.
CONVERSION (n)
END DATA (n – 1)
END CFG (n + 1)
CFG
LSB
14
t
DATA
LSB + 1
X
15
th
t
CONV
SEE NOTE
(or 30
DATA
X
16/
30
LSB
SEE NOTE
time of the next conver-
th
) SCK falling edge, or
RETURN CNV HIGH
t
DIS
(QUIET
TIME)
FOR NO BUSY
UPDATE (n + 1)
CFG/SDO
EOC
ACQUISITION
(n + 1)