EVAL-AD7689EDZ Analog Devices Inc, EVAL-AD7689EDZ Datasheet

BOARD EVAL AD7689

EVAL-AD7689EDZ

Manufacturer Part Number
EVAL-AD7689EDZ
Description
BOARD EVAL AD7689
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheets

Specifications of EVAL-AD7689EDZ

Number Of Adc's
1
Number Of Bits
16
Sampling Rate (per Second)
250k
Data Interface
Serial
Inputs Per Adc
8 Single Ended
Input Range
±VREF
Power (typ) @ Conditions
12.5mW @ 250kSPS, 5 V
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD7689
Silicon Manufacturer
Analog Devices
Application Sub Type
ADC
Kit Application Type
Data Converter
Silicon Core Number
AD7689
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Preliminary Technical Data
FEATURES
Converter and Evaluation Development (EVAL-CED1Z)
compatibility
Versatile analog signal conditioning circuitry
On-board reference, clock oscillator and buffers
PC software for control and data analysis of time and
frequency domain
Stand alone operation
GENERAL DESCRIPTION
The EVAL-AD76MUXCBZ is an evaluation board for the 20
lead PulSAR AD7682, AD7689, AD7699, and AD7949 14-bit
and 16-bit PulSAR analog to digital converter (ADC) family.
These low power, successive approximation register (SAR)
architect-ture ADCs (see Ordering Guide for product list) offer
very high performance with up to 500kSPS throughput rate and
4 – 8 channels. The evaluation board is designed to demonstrate
the ADC's performance and to provide an easy to understand
interface for a variety of system applications. A full description
of the AD7682, AD7689, AD7699, and AD7949 is available in at
Rev. PrD
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
External COM
(or Input)
Analog
Inputs
Signal conditioning
ADC
Reference Source, COM Select
ANALOG, VDD
POWER
Evaluation Board For AD7682/89/99/7949
Figure 1.Evaluation Board
DIGITAL
INTERFACE
FPGA
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
evaluation board.
The evaluation board can be operated as a stand alone or can be
used in conjunction with the Analog Devices EVAL-CED1Z
(CED) USB based data capture board. Since the ADC’s being
evaluated are serial interface only, the EVAL-AD76MUXCBZ
contains the necessary logic to perform serial to parallel
conversion for this interface using the on board FPGA.
On-board components include a high precision band gap
reference, (ADR435), reference buffers, 8-signal conditioning
circuits with an op amp and an FGPA for digital logic. Also
included are separate low drop out regulators for supplying
special voltages of 1.2V and 7V which are not available from the
EVAL-CED1Z.
The board interfaces to the EVAL-CED1Z with a 96-pin DIN
connector. J1, J2 SMB connectors are provided for the low noise
analog signal source for CH0 and CH1 with the remaining
channels (and CH0/1) available on an IDC connector, P1. J3 can
be used for providing an external common (COM) or
configured for any input channel.
FPGA
POWER
P3, 40-Pin IDC
Header
and should be consulted when utilizing this
96-Pin EVAL-CED1Z Interface
EVAL-AD76MUXEDZ
©2009 Analog Devices, Inc. All rights reserved.
PulSAR
www.analog.com
®
ADCs

Related parts for EVAL-AD7689EDZ

EVAL-AD7689EDZ Summary of contents

Page 1

... Evaluation Board For AD7682/89/99/7949 www.analog.com evaluation board. The evaluation board can be operated as a stand alone or can be used in conjunction with the Analog Devices EVAL-CED1Z (CED) USB based data capture board. Since the ADC’s being evaluated are serial interface only, the EVAL-AD76MUXCBZ contains the necessary logic to perform serial to parallel conversion for this interface using the on board FPGA ...

Page 2

... Running the Evaluation Software ..............................................5 Setup Screen...................................................................................5 Configuring the ADC ...................................................................5 DC Testing - Histogram ...............................................................5 AC Testing ......................................................................................5 Software Operation .......................................................................8 ADC Configuration ......................................................................9 Evaluation Board Schematics and Artwork............................ 15 Ordering Guide .......................................................................... 26 Figure 14. Schematic, Supplies ...................................................... 16 Figure 15. Schematic, Reference, Buffer, V Figure 16. Schematic, AnalogCH0-CH3...................................... 18 Figure 17. Schematic, AnalogCH4-CH7...................................... 19 Figure 18. Schematic, FPGA.......................................................... 20 Figure 19 ...

Page 3

... With P3-39 to P3-40 connected, these signals are only present at the test points SDO, SCK DIN and CNV. REFERENCE All of the ADCs for this evaluation board can use a precision trimmed on-chip band gap reference, an on-board precision ADR435 band gap reference external reference connected to the EXTREF test point (TP17) ...

Page 4

... The EVAL-AD76MUXCBZ is a 6-layer board carefully laid out and tested to demonstrate the specific high accuracy performance of the ADC. Figure 13 through Figure 19 shows the schematics of the evaluation board. The silkscreens for the PCB are given in Figure 20 and Figure 22. HARDWARE SETUP System Requirements • ...

Page 5

... AC test, apply a sinusoidal signal to the evaluation board at the SMB inputs J1 for CH0 and J2 for CH1. Low distortion, better than 100dB, is required to allow true evaluation of the part. One possibility is to filter the input signal from the AC source. There is no suggested bandpass filter but Rev. PrD | Page ...

Page 6

... EVAL-AD76MUXEDZ consideration should be taken in the choice. Furthermore, if using a low frequency bandpass filter when the full-scale input range is more than a few Vpp recommended to use the on Table 1. Jumper Description Jumper Name Default Position P5 - REFS P6 - BUF P7 REF/REFIN REF P8 COMS VCM JP9 5V 5V JP10 4.096V ...

Page 7

... Table 3. Bill of Materials for the Connectors Ref Des Connector Type J1, J2 Angle SMB Male P1 0.100 X 0.100 straight IDC header 2X10 P2 0.100 X 0.100 straight IDC header 2X20 P4 32X3 RT PC MOUNT CONNECTOR 1 Supplied by EVAL-CED1Z when connected. /2. REF Manf. Part No. Pasternack PE4177 3M 2540-6002UB 3M 2540-6002UB ERNI 533402 Rev ...

Page 8

... Type – Spreadsheet, saves the current data displayed in the chart in a tab delimited spreadsheet. Raw ADC Data is time domain Code, FFT or Decimated is in dB. 5. Stop (F10) is used to stops the software. The used to stop the software. RESET is used to reset the EVAL- CED1Z. Rev. PrD | Page ...

Page 9

... The Temp sensor can be used to monitor the temperature of the ADC and the output is straight binary and referenced to the ADC GND. The displayed results should be in Volts format as opposed to Hex. Figure 7. Reference Selection Rev. PrD | Page EVAL-AD76MUXEDZ ...

Page 10

... EVAL-AD76MUXEDZ use the on-screen help. Select Help, Show Context Help or click the Help (F1). An example of the Context Help is shown above for the Sample Frequency. Placing the curser on most screen items displays useful help for the particular control or displayed unit. 2. These controls are used for axes and zooming panning. ...

Page 11

... These radio buttons are used to perform a Single Capture or Continuous Capture of data set in the # of Samples field. The results are displayed in the chart. Note that the results can be displayed as Figure 9. Histogram Screen 2., 3.These display the statistics for the X and Y-axes, respectively. Rev. PrD | Page EVAL-AD76MUXEDZ (time domain) ...

Page 12

... EVAL-AD76MUXEDZ The charts can be displayed together when the Preliminary Technical Data Figure 10. Summary tab is selected. Rev. PrD | Page ...

Page 13

... Preliminary Technical Data Displays the FFT when the Spectrum chart is selected 2., 3. Display the data for the X and Y-axes, respectively. Figure 11. FFT Spectrum 2 Rev. PrD | Page EVAL-AD76MUXEDZ ...

Page 14

... EVAL-AD76MUXEDZ 1 1. Time domain data can be viewed with the oscilloscope also. Preliminary Technical Data Figure 12 .Oscilloscope Rev. PrD | Page ...

Page 15

... Preliminary Technical Data EVALUATION BOARD SCHEMATICS AND ARTWORK VPLLA2 VPLLA1 O_FPGA VI VFPGA O VI EN_7V_N EN_5V_N 3V_N EN_3. 1UF 0. BOTTOM 1UF 0. BOTTOM 1UF 0. BOTTOM 1UF 0. BOTTOM 10UF 17 9 BOTTOM TBD0805 PAD TOP Figure 13. Schematic, ADC + Block Diagram Rev. PrD | Page EVAL-AD76MUXEDZ ...

Page 16

... EVAL-AD76MUXEDZ 1 RED 1 TP31 TP28 TP29 TP30 RED RED RED 2UF 2. 2UF 2. 2UF 2. C32 C33 C34 7K 78. 210K 9K 64. 4K 300K R14 R15 R16 R17 1000PF 1000PF 1000PF C29 C30 C31 2UF 2. 2UF 2. 2UF 2. C26 C27 C28 1UF 0. 1UF 0. 1UF C24 C25 C23 2UF 2 ...

Page 17

... Preliminary Technical Data 10K 10K 1 2 R32 R33 GND 10K JP11 R25 3K 45. 096V JP10 R24 JP9 2UF 2. C37 1UF C36 10UF C35 Figure 15. Schematic, Reference, Buffer BIAS Rev. PrD | Page EVAL-AD76MUXEDZ ...

Page 18

... EVAL-AD76MUXEDZ 1 RED TP50 TP49 TP48 TP51 1 1 RED RED RED GND GND GND TBD0805 1 2 R65 GND GND 10K 10K R156 R157 1 RED TP56 TP55 TP54 TP57 1 RED RED 1 RED GND GND GND TBD0805 2 1 R44 GND GND Figure 16. Schematic, AnalogCH0-CH3 Rev ...

Page 19

... GND GND 1 RED TP65 TP64 TP63 TP66 1 RED RED 1 RED GND GND GND TBD0805 2 1 R86 GND GND Figure 17. Schematic, AnalogCH4-CH7 Rev. PrD | Page EVAL-AD76MUXEDZ 1 RED TP72 TP70 1 RED 1 GND TBD0805 1 2 R111 1 RED TP79 TP78 TP77 1 RED RED 1 1 RED ...

Page 20

... EVAL-AD76MUXEDZ GND EP2C5F256C7N E11 GNDA_PLL2 D10 I O D11 F10 I O A10 I O B10 I O G11 I O G10 I O C11 I O A11 I O A12 I O B12 I O B11 I O A13 I O B13 I O C12 I O C13 I O A14 I O B14 VCCA_PLL2 E12 ...

Page 21

... Preliminary Technical Data Figure 19. Schematic, 96-Pin Interface Rev. PrD | Page EVAL-AD76MUXEDZ ...

Page 22

... EVAL-AD76MUXEDZ Preliminary Technical Data Figure 20. Top Side Silk-Screen (Viewed from top side) Figure 21. Inner Layer 1 (Viewed from top side) Rev. PrD | Page ...

Page 23

... Preliminary Technical Data Figure 22. Ground Plane (Viewed from top side) Figure 23. Inner Layer 2 (Viewed from top side) Rev. PrD | Page EVAL-AD76MUXEDZ ...

Page 24

... EVAL-AD76MUXEDZ Preliminary Technical Data Figure 24.Inner Layer 3 (Viewed from top side) Figure 25. Bottom Layer (Viewed from top side) Rev. PrD | Page ...

Page 25

... Preliminary Technical Data Figure 26. Bottom Layer (Viewed from Bottom Side) Rev. PrD | Page EVAL-AD76MUXEDZ ...

Page 26

... EVAL-AD76MUXEDZ ORDERING GUIDE Evaluation Board Model Product EVAL-AD7682EDZ AD7682BCPZ EVAL-AD7689EDZ AD7689BCPZ EVAL-AD7699EDZ AD7699BCPZ EVAL-AD7949EDZ AD7949BCPZ EVAL-CED1Z Capture/Controller Board ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. EB08140-0-3/09(PrD) Preliminary Technical Data Rev. PrD | Page ...

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