PESD3V3S2UQ,115 NXP Semiconductors, PESD3V3S2UQ,115 Datasheet - Page 9

DIODE DBL ESD PROTECTION SOT663

PESD3V3S2UQ,115

Manufacturer Part Number
PESD3V3S2UQ,115
Description
DIODE DBL ESD PROTECTION SOT663
Manufacturer
NXP Semiconductors
Datasheets

Specifications of PESD3V3S2UQ,115

Package / Case
SOT-663
Voltage - Reverse Standoff (typ)
3.3V
Voltage - Breakdown
5.6V
Power (watts)
150W
Polarization
2 Channel Array - Unidirectional
Mounting Type
Surface Mount
Polarity
Unidirectional
Clamping Voltage
8 V
Operating Voltage
3.3 V
Breakdown Voltage
5.6 V
Termination Style
SMD/SMT
Peak Surge Current
15 A
Peak Pulse Power Dissipation
150 W
Capacitance
200 pF
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 65 C
Dimensions
1.3 mm W x 1.7 mm L x 0.6 mm H
Operating Temperature Min Deg. C
-65C
Operating Temperature Max Deg. C
150C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4519-2
934057839115
PESD3V3S2UQ T/R
PESD3V3S2UQ T/R
NXP Semiconductors
7. Application information
PESDXS2UQ_SER_4
Product data sheet
The PESDxS2UQ series is designed for the protection of up to two unidirectional data
lines from the damage caused by ESD and surge pulses. The devices may be used on
lines where the signal polarities are below ground. The PESDxS2UQ series provides a
surge capability of up to 150 W (P
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the device as close to the input terminal or connector as possible.
2. The path length between the device and the protected line should be minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
Fig 9.
ground loops.
vias.
Typical application: ESD protection of data lines
unidirectional protection
Rev. 04 — 26 January 2010
of two lines
line 1 to be protected
line 2 to be protected
PESDxS2UQ
ground
PP
Double ESD protection diodes in SOT663 package
) per line for an 8/20 μs waveform.
PESDxS2UQ series
bidirectional protection
of one line
PESDxS2UQ
line 1 to be protected
ground
001aaa730
© NXP B.V. 2010. All rights reserved.
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