ATTINY48-MU Atmel, ATTINY48-MU Datasheet - Page 188
ATTINY48-MU
Manufacturer Part Number
ATTINY48-MU
Description
MCU AVR 4K ISP FLASH 1.8V 32-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY48-MU
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
2-Wire, I2S, SPI
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
32QFN EP
Device Core
AVR
Family Name
ATtiny
Maximum Speed
12 MHz
Operating Supply Voltage
2.5|3.3|5 V
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Price
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20. Lock Bits, Fuse Bits and Device Signature
20.1
188
Lock Bits
ATtiny48/88
ATtiny48/88 provide the program and data memory lock bits listed in
Table 20-1.
Notes:
Lock bits can be left unprogrammed (“1”) or can be programmed (“0”) to obtain the additional
features listed in
Table 20-2.
Notes:
Lock bits can be erased to “1” with the Chip Erase command, only.
The ATtiny48/88 has no separate Boot Loader section. The SPM instruction is enabled for the
whole Flash if the SELFPRGEN fuse is programmed (“0”), otherwise it is disabled.
LB2
LB1
LB Mode
Lock Bit Byte
1
2
3
1. “1” means unprogrammed, “0” means programmed.
1. Program the Fuse bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
Memory Lock Bits
Lock Bit Byte
Lock Bit Protection Modes
Table
LB2
1
1
0
20-2.
LB1
1
0
0
Bit No
7
6
5
4
3
2
1
0
Protection Type
No memory lock features enabled.
Further programming of Flash and EEPROM is disabled in
parallel and serial programming mode. Fuse bits are locked in
both serial and parallel programming mode
Further reading and programming of Flash and EEPROM is
disabled in parallel and serial programming mode. Fuse bits are
locked in both serial and parallel programming mode
(1)(2)
Description
–
–
–
–
–
–
Lock bit
Lock bit
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
Table
20-1.
(1)
(1)
8008G–AVR–04/11
(1)
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