ATTINY48-MU Atmel, ATTINY48-MU Datasheet - Page 74
ATTINY48-MU
Manufacturer Part Number
ATTINY48-MU
Description
MCU AVR 4K ISP FLASH 1.8V 32-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY48-MU
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
2-Wire, I2S, SPI
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
32QFN EP
Device Core
AVR
Family Name
ATtiny
Maximum Speed
12 MHz
Operating Supply Voltage
2.5|3.3|5 V
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
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Manufacturer:
Atmel
Quantity:
5
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Part Number:
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Manufacturer:
LT
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74
ATtiny48/88
Table 10-9
shown in
Table 10-9.
Note:
Table 10-10. Overriding Signals for Alternate Functions in PC[3:0]
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
1. When enabled, the 2-wire Serial Interface enables slew-rate controls on the output pins PC4
Figure 10-6 on page
PC3/ADC3/
PCINT11
0
0
0
0
0
0
PCINT11 • PCIE1 +
ADC3D
PCINT11 • PCIE1
PCINT11 INPUT
ADC3 INPUT
and PC5. This is not shown in the figure. In addition, spike filters are connected between the
AIO outputs shown in the port figure and the digital logic of the TWI module.
and
PC7/PCINT15
0
0
0
0
0
0
PCINT15 • PCIE1
1
PCINT15 INPUT
-
Overriding Signals for Alternate Functions in PC[6:4]
Table 10-10
relate the alternate functions of Port C to the overriding signals
66.
PC2/ADC2/
PCINT10
0
0
0
0
0
0
PCINT10 • PCIE1 +
ADC2D
PCINT10 • PCIE1
PCINT10 INPUT
ADC2 INPUT
PC6/RESET/
PCINT14
RSTDISBL
1
RSTDISBL
0
0
0
RSTDISBL +
PCINT14 • PCIE1
RSTDISBL
PCINT14 INPUT
RESET INPUT
PC1/ADC1/
PCINT9
0
0
0
0
0
0
PCINT9 • PCIE1 +
ADC1D
PCINT9 • PCIE1
PCINT9 INPUT
ADC1 INPUT
PC5/SCL/ADC5/
PCINT13
TWEN
PORTC5 • PUD
TWEN
SCL_OUT
TWEN
0
PCINT13 • PCIE1 +
ADC5D
PCINT13 • PCIE1
PCINT13 INPUT
ADC5 INPUT / SCL
INPUT
(1)
PC0/ADC0/
PCINT8
0
0
0
0
0
0
PCINT8 • PCIE1 +
ADC0D
PCINT8 • PCIE1
PCINT8 INPUT
ADC0 INPUT
PC4/SDA/ADC4/
PCINT12
TWEN
PORTC4 • PUD
TWEN
SDA_OUT
TWEN
0
PCINT12 • PCIE1 +
ADC4D
PCINT12 • PCIE1
PCINT12 INPUT
ADC4 INPUT / SDA
INPUT
8008G–AVR–04/11
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