ATTINY2313V-10MU Atmel, ATTINY2313V-10MU Datasheet - Page 39

10MHZ MLF IND TEMP GREEN

ATTINY2313V-10MU

Manufacturer Part Number
ATTINY2313V-10MU
Description
10MHZ MLF IND TEMP GREEN
Manufacturer
Atmel
Series
AVR® ATtinyr

Specifications of ATTINY2313V-10MU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI/UART/USI
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
18
Number Of Timers
2
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q2312268B

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY2313V-10MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Watchdog Timer
2543L–AVR–08/10
ATtiny2313 has an Enhanced Watchdog Timer (WDT). The main features are:
Figure 20. Watchdog Timer
The Watchdog Timer (WDT) is a timer counting cycles of a separate on-chip 128 kHz oscillator.
The WDT gives an interrupt or a system reset when the counter reaches a given time-out value.
In normal operation mode, it is required that the system uses the WDR - Watchdog Timer Reset
- instruction to restart the counter before the time-out value is reached. If the system doesn't
restart the counter, an interrupt or system reset will be issued.
In Interrupt mode, the WDT gives an interrupt when the timer expires. This interrupt can be used
to wake the device from sleep-modes, and also as a general system timer. One example is to
limit the maximum time allowed for certain operations, giving an interrupt when the operation
has run longer than expected. In System Reset mode, the WDT gives a reset when the timer
expires. This is typically used to prevent system hang-up in case of runaway code. The third
mode, Interrupt and System Reset mode, combines the other two modes by first giving an inter-
rupt and then switch to System Reset mode. This mode will for instance allow a safe shutdown
by saving critical parameters before a system reset.
The Watchdog always on (WDTON) fuse, if programmed, will force the Watchdog Timer to Sys-
tem Reset mode. With the fuse programmed the System Reset mode bit (WDE) and Interrupt
mode bit (WDIE) are locked to 1 and 0 respectively.
To further ensure program security, alterations to the Watchdog set-up must follow timed
sequences. The sequence for clearing WDE and changing time-out configuration is as follows:
1. In the same operation, write a logic one to the Watchdog change enable bit (WDCE) and
2. Within the next four clock cycles, write the WDE and Watchdog prescaler bits (WDP) as
Clocked from separate On-chip Oscillator
3 Operating modes
Selectable Time-out period from 16ms to 8s
Possible Hardware fuse Watchdog always on (WDTON) for fail-safe mode
– Interrupt
– System Reset
– Interrupt and System Reset
WDE. A logic one must be written to WDE regardless of the previous value of the WDE
bit.
desired, but with the WDCE bit cleared. This must be done in one operation.
WATCHDOG
RESET
OSCILLATOR
128kHz
WDIE
WDIF
WDE
WDP0
WDP1
WDP2
WDP3
MCU RESET
INTERRUPT
39

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