ATTINY2313V-10MU Atmel, ATTINY2313V-10MU Datasheet - Page 71

• Manufacturer Part Number: ATTINY2313V-10MU
• Description: 10MHZ MLF IND TEMP GREEN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY2313V-10MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-MLF®, QFN
• Processor Series: ATTINY2x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI/UART/USI
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q2312268B

Timer/Counter
Timing Diagrams
2543L–AVR–08/10
•
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when Interrupt
Flags are set.
shows the count sequence close to the MAX value in all modes other than phase correct PWM
mode.
Figure 34. Timer/Counter Timing Diagram, no Prescaling
Figure 34
Figure 35. Timer/Counter Timing Diagram, with Prescaler (f
Figure 36
and PWM mode, where OCR0A is TOP.
Figure 36. Timer/Counter Timing Diagram, Setting of OCF0x, with Prescaler (f
Figure 37
mode where OCR0A is TOP.
The timer starts counting from a value higher than the one in OCR0A, and for that reason
misses the Compare Match and hence the OCn change that would have happened on the
way up.
TCNTn
TCNTn
TCNTn
(clk
(clk
(clk
OCRnx
TOVn
TOVn
OCFnx
clk
clk
clk
clk
clk
clk
I/O
I/O
I/O
I/O
Tn
I/O
Tn
I/O
Tn
/1)
/8)
/8)
shows the same timing data, but with the prescaler enabled.
shows the setting of OCF0B in all modes and OCF0A in all modes except CTC mode
shows the setting of OCF0A and the clearing of TCNT0 in CTC mode and fast PWM
Figure 34
OCRnx - 1
MAX - 1
MAX - 1
contains timing data for basic Timer/Counter operation. The figure
OCRnx
MAX
MAX
OCRnx Value
clk_I/O
OCRnx + 1
BOTTOM
BOTTOM
/8)
T0
) is therefore shown as a
BOTTOM + 1
BOTTOM + 1
clk_I/O
OCRnx + 2
/8)
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