PIC18F13K50-I/SO Microchip Technology, PIC18F13K50-I/SO Datasheet - Page 10

• Manufacturer Part Number: PIC18F13K50-I/SO
• Description: IC PIC MCU FLASH 8K 1.8V 20-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F13K50-I/SO

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 15
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 20SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPXLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICAC164307 - MODULE SKT FOR PM3 28SSOP
• Lead Free Status / Rohs Status: Details

PIC18F1XK50/PIC18LF1XK50
FIGURE 3-7:
3.4
When
Section 2.1.1.1 “Single-Supply ICSP Programming”),
the Low-Voltage ICSP mode is enabled. As shown in
Figure 3-8, Low-Voltage ICSP Program/Verify mode is
entered by holding PGC and PGD low, placing a logic
high on PGM and then raising MCLR/V
this mode, the RC3/PGM pin is dedicated to the
programming function and ceases to be a general
purpose I/O pin. Figure 3-9 shows the exit sequence.
The sequence that enters the device into the Program/
Verify mode places all unused I/Os in the high-impedance
state.
FIGURE 3-8:
DS41342E-page 10
MCLR/V
PGM
PGD
PGC
V
DD
MCLR/V
D110
V
PGD
PGC
DD
the
Entering and Exiting Low-Voltage
ICSP Program/Verify Mode
PP
V
/RA3
IH
LVP
PP
/RA3
V
PGD = Input
PGD = Input
Configuration
IH
P15
EXITING HIGH-VOLTAGE
PROGRAM/VERIFY MODE
ENTERING LOW-VOLTAGE
PROGRAM/VERIFY MODE
P16
P1
P12
P17
bit
PP
/RA3 to V
is
Advance Information
‘1’
IH
(see
. In
FIGURE 3-9:
MCLR/V
V
PGM
PGD
PGC
DD
PP
/RA3
PGD = Input
EXITING LOW-VOLTAGE
PROGRAM/VERIFY MODE
 2010 Microchip Technology Inc.
V
P16
IH
V
P18
IH