PIC18F13K50-I/SO Microchip Technology, PIC18F13K50-I/SO Datasheet - Page 24

• Manufacturer Part Number: PIC18F13K50-I/SO
• Description: IC PIC MCU FLASH 8K 1.8V 20-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F13K50-I/SO

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 15
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 20SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPXLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICAC164307 - MODULE SKT FOR PM3 28SSOP
• Lead Free Status / Rohs Status: Details

PIC18F1XK50/PIC18LF1XK50
5.2
The verify step involves reading back the program
Flash space and comparing it against the copy held in
the programmer’s buffer. Memory reads occur a single
byte at a time, so two bytes must be read to compare
against the word in the programmer’s buffer. Refer to
Section 5.1 “Read Program Flash, ID Locations and
Configuration Bits” for implementation details of
reading program Flash.
FIGURE 5-2:
DS41342E-page 24
Verify Program Flash and ID
Locations
No
with Post-increment
with Post-increment
Set TBLPTR = 0
Read High Byte
Read Low Byte
Word = Expect
program Flash
verified?
data?
Does
VERIFY PROGRAM FLASH FLOW
Start
All
Yes
Yes
No
Failure,
Report
Error
Advance Information
Increment
Pointer
The Table Pointer must be manually set to 200000h
(base address of the ID locations) once the program
Flash has been verified. The post-increment feature of
the Table Read 4-bit command can not be used to
increment the Table Pointer beyond the program Flash
space. In a 64-Kbyte device, for example, a post-
increment read of address FFFFh will wrap the Table
Pointer back to 000000h, rather than point to
unimplemented address, 010000h.
No
Set TBLPTR = 200000h
with Post-Increment
with Post-Increment
Read High byte
Read Low Byte
Word = Expect
ID locations
verified?
data?
Done
Does
 2010 Microchip Technology Inc.
All
Yes
Yes
No
Failure,
Report
Error