PIC18LF13K50-I/P Microchip Technology, PIC18LF13K50-I/P Datasheet - Page 39
![IC PIC MCU FLASH 4KX16 20-PDIP](/photos/12/13/121303/150-20-dip_sml.jpg)
PIC18LF13K50-I/P
Manufacturer Part Number
PIC18LF13K50-I/P
Description
IC PIC MCU FLASH 4KX16 20-PDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F13K50-ISS.pdf
(420 pages)
2.PIC18F13K50-ISS.pdf
(40 pages)
3.PIC18F13K50-ISS.pdf
(10 pages)
4.PIC18F13K50-ISS.pdf
(2 pages)
5.PIC18F13K50-ISO.pdf
(414 pages)
Specifications of PIC18LF13K50-I/P
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
15
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
48MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART, I2C, MSSP, SPI, USB
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
18
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC18F13K50-ISS PDF datasheet
- PIC18F13K50-ISS PDF datasheet #2
- PIC18F13K50-ISS PDF datasheet #3
- PIC18F13K50-ISS PDF datasheet #4
- PIC18F13K50-ISO PDF datasheet #5
- Current page: 39 of 414
- Download datasheet (4Mb)
TABLE 3-2:
© 2009 Microchip Technology Inc.
TOSU
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
INTCON
INTCON2
INTCON3
INDF0
POSTINC0 Uses contents of FSR0 to address data memory – value of FSR0 post-incremented (not a physical register)
POSTDEC0 Uses contents of FSR0 to address data memory – value of FSR0 post-decremented (not a physical register)
PREINC0
PLUSW0
FSR0H
FSR0L
WREG
INDF1
POSTINC1 Uses contents of FSR1 to address data memory – value of FSR1 post-incremented (not a physical register)
POSTDEC1 Uses contents of FSR1 to address data memory – value of FSR1 post-decremented (not a physical register)
PREINC1
PLUSW1
FSR1H
FSR1L
BSR
INDF2
POSTINC2 Uses contents of FSR2 to address data memory – value of FSR2 post-incremented (not a physical register)
POSTDEC2 Uses contents of FSR2 to address data memory – value of FSR2 post-decremented (not a physical register)
PREINC2
PLUSW2
FSR2H
FSR2L
STATUS
Legend:
Note
File Name
1:
2:
3:
Top-of-Stack, High Byte (TOS<15:8>)
Top-of-Stack, Low Byte (TOS<7:0>)
Holding Register for PC<15:8>
PC, Low Byte (PC<7:0>)
Program Memory Table Pointer, High Byte (TBLPTR<15:8>)
Program Memory Table Pointer, Low Byte (TBLPTR<7:0>)
Program Memory Table Latch
Product Register, High Byte
Product Register, Low Byte
Uses contents of FSR0 to address data memory – value of FSR0 not changed (not a physical register)
Uses contents of FSR0 to address data memory – value of FSR0 pre-incremented (not a physical register)
Uses contents of FSR0 to address data memory – value of FSR0 pre-incremented (not a physical register) – value
of FSR0 offset by W
Indirect Data Memory Address Pointer 0, Low Byte
Working Register
Uses contents of FSR1 to address data memory – value of FSR1 not changed (not a physical register)
Uses contents of FSR1 to address data memory – value of FSR1 pre-incremented (not a physical register)
Uses contents of FSR1 to address data memory – value of FSR1 pre-incremented (not a physical register) – value
of FSR1 offset by W
Indirect Data Memory Address Pointer 1, Low Byte
Uses contents of FSR2 to address data memory – value of FSR2 not changed (not a physical register)
Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented (not a physical register)
Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented (not a physical register) – value
of FSR2 offset by W
Indirect Data Memory Address Pointer 2, Low Byte
x = unknown, u = unchanged, — = unimplemented, q = value depends on condition
The SBOREN bit is only available when the BOREN<1:0> Configuration bits = 01; otherwise it is disabled and reads as ‘0’. See
Section 23.4 “Brown-out Reset (BOR)”.
The RA3 bit is only available when Master Clear Reset is disabled (MCLRE Configuration bit = 0). Otherwise, RA3 reads as ‘0’. This bit is
read-only.
Bits RA0 and RA1 are available only when USB is disabled.
GIE/GIEH
STKFUL
RABPU
INT2IP
Bit 7
—
—
—
—
—
—
—
—
REGISTER FILE SUMMARY (PIC18F1XK50/PIC18LF1XK50)
PEIE/GIEL
INTEDG0
STKUNF
INT1IP
Bit 6
—
—
—
—
—
—
—
—
INTEDG1
TMR0IE
Bit 5
—
—
—
—
—
—
—
—
—
—
PIC18F1XK50/PIC18LF1XK50
Top-of-Stack Upper Byte (TOS<20:16>)
Holding Register for PC<20:16>
Program Memory Table Pointer Upper Byte (TBLPTR<20:16>)
INTEDG2
INT2IE
INT0IE
Bit 4
SP4
—
—
—
—
N
Preliminary
Indirect Data Memory Address Pointer 0, High Byte
Indirect Data Memory Address Pointer 1, High Byte
Bank Select Register
Indirect Data Memory Address Pointer 2, High Byte
INT1IE
RABIE
Bit 3
SP3
OV
—
TMR0IF
TMR0IP
Bit 2
SP2
—
Z
INT0IF
INT2IF
Bit 1
SP1
DC
—
RABIP
INT1IF
RABIF
Bit 0
SP0
C
DS41350C-page 37
---0 0000 279, 26
0000 0000 279, 26
0000 0000 279, 26
00-0 0000 279, 27
---0 0000 279, 26
0000 0000 279, 26
0000 0000 279, 26
---0 0000 279, 50
0000 0000 279, 50
0000 0000 279, 50
0000 0000 279, 50
xxxx xxxx 279, 61
xxxx xxxx 279, 61
0000 000x 279, 65
1111 -1-1 279, 66
11-0 0-00 279, 67
---- 0000 279, 43
xxxx xxxx 279, 43
xxxx xxxx
---- 0000 280, 43
xxxx xxxx 280, 43
---- 0000 280, 31
---- 0000 280, 43
xxxx xxxx 280, 43
---x xxxx 280, 41
POR, BOR
Value on
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Details
279, 43
279, 43
279, 43
279, 43
279, 43
279, 43
279, 43
279, 43
279, 43
279, 43
280, 43
280, 43
280, 43
280, 43
280, 43
page:
279
on
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