ATTINY26-16MU Atmel, ATTINY26-16MU Datasheet - Page 14

• Manufacturer Part Number: ATTINY26-16MU
• Description: IC AVR MCU 2K 16MHZ IND 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY26-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Processor Series: ATTINY2x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: 2-Wire, ISP, SM-Bus, SPI, UART, USI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 32MLF EP
• Device Core: AVR
• Family Name: ATtiny
• Maximum Speed: 16 MHz
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Constant Addressing
Using the LPM
Instruction
Indirect Program
Addressing, IJMP and
ICALL
Relative Program
Addressing, RJMP
and RCALL
14
ATtiny26(L)
The X-, Y-, or Z-register is incremented after the operation. Operand address is the content of
the X-, Y-, or Z-register prior to incrementing.
Figure 13. Code Memory Constant Addressing
Constant byte address is specified by the Z-register contents. The 15 MSBs select word address
(0 - 1K), the LSB selects low byte if cleared (LSB = 0) or high byte if set (LSB = 1).
Figure 14. Indirect Program Memory Addressing
Program execution continues at address contained by the Z-register (i.e., the PC is loaded with
the contents of the Z-register).
Figure 15. Relative Program Memory Addressing
+1
PROGRAM MEMORY
PROGRAM MEMORY
PROGRAM MEMORY
$000
$3FF
$000
$3FF
$3FF
1477K–AVR–08/10
$000