ATTINY26-16MU Atmel, ATTINY26-16MU Datasheet - Page 87
![IC AVR MCU 2K 16MHZ IND 32-QFN](/photos/12/13/121313/attiny26-16mu_sml.jpg)
ATTINY26-16MU
Manufacturer Part Number
ATTINY26-16MU
Description
IC AVR MCU 2K 16MHZ IND 32-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY26-16MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
2-Wire, ISP, SM-Bus, SPI, UART, USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
32MLF EP
Device Core
AVR
Family Name
ATtiny
Maximum Speed
16 MHz
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY26-16MU
Manufacturer:
ATMEL
Quantity:
7 119
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- Download datasheet (3Mb)
SPI Slave Operation
Example
1477K–AVR–08/10
The following code demonstrates how to use the USI module as a SPI Master with maximum
speed (fsck = fck/2):
The following code demonstrates how to use the USI module as a SPI slave:
The code is size optimized using only 8 instructions (+ ret). The code example assumes that the
DO is configured as output and SCK pin is configured as input in the DDRB Register. The value
stored in register r16 prior to the function is called is transferred to the master device, and when
the transfer is completed the data received from the master is stored back into the r16 register.
SPITransfer_Fast:
ret
init:
...
SlaveSPITransfer:
SlaveSPITransfer_loop:
out
ldi
ldi
out
out
out
out
out
out
out
out
out
out
out
out
out
out
out
out
in
ldi
out
out
ldi
out
sbis
rjmp
in
ret
USIDR,r16
r16,(1<<USIWM0)+(0<<USICS0)+(1<<USITC)
r17,(1<<USIWM0)+(0<<USICS0)+(1<<USITC)+(1<<USICLK)
USICR,r16 ; MSB
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16 ; LSB
USICR,r17
r16,USIDR
r16,(1<<USIWM0)+(1<<USICS1)
USICR,r16
USIDR,r16
r16,(1<<USIOIF)
USISR,r16
USISR,USIOIF
SlaveSPITransfer_loop
r16,USIDR
87
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