AT90PWM3B-16SU Atmel, AT90PWM3B-16SU Datasheet - Page 149

• Manufacturer Part Number: AT90PWM3B-16SU
• Description: IC MCU AVR RISC 8K FLASH 32-SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3B-16SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-SOIC (7.5mm Width)
• Processor Series: AT90PWMx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• On-chip Dac: 1-chx10-bit
• Controller Family/series: AVR PWM
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.10 PSC Input Mode 2: Stop signal, Execute Opposite Dead-Time and Wait
4317J–AVR–08/10
PSCOUTn0
PSCOUTn1
PSC Input A
PSC Input B
PSCOUTn0
PSCOUTn1
PSC Input A
PSC Input B
DT0
DT0
OT0
OT0
Figure 16-22. PSCn behaviour versus PSCn Input A in Fault Mode 2
PSC Input A is take into account during DT0 and OT0 only. It has no effect during DT1 and OT1.
When PSCn Input A event occurs, PSC releases PSCOUTn0, jumps and executes DT1 plus
OT1 and then waits for PSC Input A inactive state.
Even if PSC Input A is released during DT1 or OT1, DT1 plus OT1 sub-cycle is always com-
pletely executed.
Figure 16-23. PSCn behaviour versus PSCn Input B in Fault Mode 2
PSC Input B is take into account during DT1 and OT1 only. It has no effect during DT0 and OT0.
When PSC Input B event occurs, PSC releases PSCOUTn1, jumps and executes DT0 plus OT0
and then waits for PSC Input B inactive state.
Even if PSC Input B is released during DT0 or OT0, DT0 plus OT0 sub-cycle is always com-
pletely executed.
DT1
DT1
OT1
OT1
DT0
DT0 OT0 DT1
OT0
DT1
OT1
OT1
DT0
OT0
AT90PWM2/3/2B/3B
DT0
OT0
DT1
DT1
OT1
OT1
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