AT90PWM3B-16SU Atmel, AT90PWM3B-16SU Datasheet - Page 223

• Manufacturer Part Number: AT90PWM3B-16SU
• Description: IC MCU AVR RISC 8K FLASH 32-SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3B-16SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-SOIC (7.5mm Width)
• Processor Series: AT90PWMx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• On-chip Dac: 1-chx10-bit
• Controller Family/series: AVR PWM
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.6.4
4317J–AVR–08/10
EUSART Control Register B – EUCSRB
Table 19-2.
• Bit 7:5 –Reserved Bits
These bits are reserved for future use. For compatibilty with future devices, these bits must be
written to zero when EUSCRB is written.
• Bit 4 – EUSART Enable Bit
Set to enable the EUSART mode, clear to operate as standard USART.
• Bit 3– EUSBS Enable Bit
This bit selects the number of stop bits detected by the receiver.
Table 19-3.
Note:
• Bit 2–Reserved Bit
This bit is reserved for future use. For compatibilty with future devices, this bit must be written to
zero when EUSCRB is written.
• Bit 1 – Manchester mode
Bit
Read/Write
Initial Value
URxS3
1
1
1
1
1
1
1
The number of stop bit inserted by the Transmitter in EUSART mode is configurable throught the
USBS bit of in the of the USART.
URxS Bits Settings
EUSBS Bit Settings
EUSBS
R
7
0
-
0
1
URxS2
0
0
0
1
1
1
1
R
6
0
-
URxS1
R
5
0
-
0
1
1
0
0
1
1
Receiver Stop Bit(s)
1-bit
2-bit
EUSART
R/W
4
0
URxS0
EUSBS
1
0
1
0
1
0
1
R/W
3
0
AT90PWM2/3/2B/3B
Receive Character Size
14-bit
15-bit
16-bit
Reserved
Reserved
16 OR 17 bit (for Manchester
encoded only mode)
17-bit
R
2
0
-
EMCH
R/W
1
0
BODR
R/W
0
0
EUCSRB
223