AT90PWM3B-16SU Atmel, AT90PWM3B-16SU Datasheet - Page 162

• Manufacturer Part Number: AT90PWM3B-16SU
• Description: IC MCU AVR RISC 8K FLASH 32-SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3B-16SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-SOIC (7.5mm Width)
• Processor Series: AT90PWMx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• On-chip Dac: 1-chx10-bit
• Controller Family/series: AVR PWM
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.25.4
16.25.5
16.25.6
162
AT90PWM2/3/2B/3B
Output Compare SA Register – OCRnSAH and OCRnSAL
Output Compare RA Register – OCRnRAH and OCRnRAL
Output Compare SB Register – OCRnSBH and OCRnSBL
Table 16-12. Synchronization Source Description in Centered Mode
• Bit 3 – POEN2D : PSCOUT23 Output Enable (PSC2 only)
When this bit is clear, second I/O pin affected to PSCOUT23 acts as a standard port.
When this bit is set, second I/O pin affected to PSCOUT23 is connected to the PSC waveform
generator B output and is set and clear according to the PSC operation.
• Bit 2 – POENnB: PSC n OUT Part B Output Enable
When this bit is clear, I/O pin affected to PSCOUTn1 acts as a standard port.
When this bit is set, I/O pin affected to PSCOUTn1 is connected to the PSC waveform generator
B output and is set and clear according to the PSC operation.
• Bit 1 – POEN2C : PSCOUT22 Output Enable (PSC2 only)
When this bit is clear, second I/O pin affected to PSCOUT22 acts as a standard port.
When this bit is set, second I/O pin affected to PSCOUT22 is connected to the PSC waveform
generator A output and is set and clear according to the PSC operation.
• Bit 0 – POENnA: PSC n OUT Part A Output Enable
When this bit is clear, I/O pin affected to PSCOUTn0 acts as a standard port.
When this bit is set, I/O pin affected to PSCOUTn0 is connected to the PSC waveform generator
A output and is set and clear according to the PSC operation.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
PSYNCn1
0
0
1
1
PSYNCn0
0
1
0
1
W
W
7
–
0
7
–
0
7
–
W
W
6
–
0
6
–
0
6
–
Description
Send signal on match with OCRnRA (during counting down of PSC). The
min value of OCRnRA must be 1.
Send signal on match with OCRnRA (during counting up of PSC). The
min value of OCRnRA must be 1.
no synchronization signal
no synchronization signal
W
W
5
–
0
5
–
0
5
–
W
W
OCRnRA[7:0]
4
–
OCRnSA[7:0]
0
4
–
0
4
–
OCRnSB[7:0]
W
W
3
0
3
0
3
OCRnRA[11:8]
OCRnSA[11:8]
OCRnSB[11:8]
W
W
2
0
2
0
2
W
W
1
0
1
0
1
W
W
0
0
0
0
0
4317J–AVR–08/10
OCRnSAH
OCRnRAH
OCRnRAL
OCRnSBH
OCRnSAL
OCRnSBL