PIC24HJ16GP304-I/ML Microchip Technology, PIC24HJ16GP304-I/ML Datasheet - Page 175

IC PIC MCU FLASH 16K 44QFN

PIC24HJ16GP304-I/ML

Manufacturer Part Number
PIC24HJ16GP304-I/ML
Description
IC PIC MCU FLASH 16K 44QFN
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ16GP304-I/ML

Program Memory Type
FLASH
Program Memory Size
16KB (5.5K x 24)
Package / Case
44-QFN
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24HJ16GP304-I/ML
Manufacturer:
MICROCHIP
Quantity:
12 000
19.2
All
PIC24HJ16GP304 devices power their core digital
logic at a nominal 2.5V. This can create a conflict for
designs that are required to operate at a higher typical
voltage, such as 3.3V. To simplify system design, all
devices
PIC24HJ16GP304 family incorporate an on-chip regu-
lator that allows the device to run its core logic from
V
The regulator provides power to the core from the other
V
(less than 5 ohms) capacitor (such as tantalum or
ceramic) must be connected to the V
(Figure
regulator. The recommended value for the filter capac-
itor is provided in
“DC
On a POR
voltage regulator to generate an output voltage. During
this time, designated as T
disabled. T
resumes operation after any power-down.
FIGURE 19-1:
© 2011 Microchip Technology Inc.
DD
DD
Note:
Note 1:
.
pins. When the regulator is enabled, a low-ESR
Characteristics”.
of
19-1). This helps to maintain the stability of the
10 µF
2:
On-Chip Voltage Regulator
C
,
PIC24HJ32GP202/204 AND PIC24HJ16GP304
EFC
STARTUP
in
it takes approximately 20 μs for the on-chip
It is important for the low-ESR capacitor to
be placed as close as possible to the V
pin.
These are typical operating voltages. Refer
to
Characteristics”
ranges of V
It is important for the low-ESR capacitor to
be placed as close as possible to the V
pin.
the
3.3V
Table 22-13
the
Table 22-13
is applied every time the device
PIC24HJ32GP202/204
CONNECTIONS FOR THE
ON-CHIP VOLTAGE
REGULATOR
V
V
V
DD
PIC24HJ32GP202/204
DD
CAP
SS
PIC24H
STARTUP
located in
and V
for the full operating
located in
CAP
, code execution is
.
Section 22.1 “DC
(1)
Section 22.1
CAP
CAP
CAP
and
and
pin
19.3
The Brown-out Reset (BOR) module is based on an
internal voltage reference circuit that monitors the
regulated voltage V
module is to generate a device Reset when a
brown-out condition occurs. Brown-out conditions are
generally caused by glitches on the AC mains (for
example, missing portions of the AC cycle waveform
due to bad power transmission lines, or voltage sags
due to excessive current draw when a large inductive
load is turned on).
A BOR generates a Reset pulse, which resets the
device. The BOR selects the clock source, based on
the device Configuration bit values (FNOSC<2:0> and
POSCMD<1:0>).
If an oscillator mode is selected, the BOR activates the
Oscillator Start-up Timer (OST). The system clock is
held until OST expires. If the PLL is used, the clock is
held until the LOCK bit (OSCCON<5>) is ‘1’.
Concurrently, the PWRT time-out (TPWRT) will be
applied before the internal Reset is released. If TPWRT
= 0 and a crystal oscillator is being used, a nominal
delay of TFSCM = 100 is applied. The total delay in this
case is TFSCM.
The BOR Status bit (RCON<1>) is set to indicate that a
BOR has occurred. The BOR circuit continues to
operate while in Sleep or Idle mode and resets the
device in case V
voltage.
Brown-Out Reset (BOR)
DD
CAP
falls below the BOR threshold
. The main purpose of the BOR
DS70289G-page 175

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