PIC24HJ16GP304-I/ML Microchip Technology, PIC24HJ16GP304-I/ML Datasheet - Page 94

IC PIC MCU FLASH 16K 44QFN

PIC24HJ16GP304-I/ML

Manufacturer Part Number
PIC24HJ16GP304-I/ML
Description
IC PIC MCU FLASH 16K 44QFN
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ16GP304-I/ML

Program Memory Type
FLASH
Program Memory Size
16KB (5.5K x 24)
Package / Case
44-QFN
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24HJ16GP304-I/ML
Manufacturer:
MICROCHIP
Quantity:
12 000
PIC24HJ32GP202/204 AND PIC24HJ16GP304
REGISTER 8-2:
DS70289G-page 94
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7-6
bit 5
bit 4-0
Note 1:
R/W-0
R/W-0
ROI
2:
PLLPOST<1:0>
This bit is cleared when the ROI bit is set and an interrupt occurs.
This register is reset only on a Power-on Reset (POR).
ROI: Recover on Interrupt bit
1 = Interrupts will clear the DOZEN bit and the processor clock/peripheral clock ratio is set to 1:1
0 = Interrupts have no effect on the DOZEN bit
DOZE<2:0>: Processor Clock Reduction Select bits
111 = F
110 = F
101 = F
100 = F
011 = F
010 = F
001 = F
000 = F
DOZEN: DOZE Mode Enable bit
1 = DOZE<2:0> field specifies the ratio between the peripheral clocks and the processor clocks
0 = Processor clock/peripheral clock ratio forced to 1:1
FRCDIV<2:0>: Internal Fast RC Oscillator Postscaler bits
111 = FRC divide by 256
110 = FRC divide by 64
101 = FRC divide by 32
100 = FRC divide by 16
011 = FRC divide by 8
010 = FRC divide by 4
001 = FRC divide by 2
000 = FRC divide by 1 (default)
PLLPOST<1:0>: PLL VCO Output Divider Select bits (also denoted as ‘N2’, PLL postscaler)
11 = Output/8
10 = Reserved
01 = Output/4 (default)
00 = Output/2
Unimplemented: Read as ‘0’
PLLPRE<4:0>: PLL Phase Detector Input Divider bits (also denoted as ‘N1’, PLL prescaler)
11111 = Input/33
00001 = Input/3
00000 = Input/2 (default)
R/W-0
R/W-1
CLKDIV: CLOCK DIVISOR REGISTER
CY
CY
CY
CY
CY
CY
CY
CY
/128
/64
/32
/16
/8 (default)
/4
/2
/1
y = Value set from Configuration bits on POR
W = Writable bit
‘1’ = Bit is set
DOZE<2:0>
R/W-1
U-0
R/W-1
R/W-0
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DOZEN
R/W-0
R/W-0
(2)
(1)
PLLPRE<4:0>
R/W-0
R/W-0
© 2011 Microchip Technology Inc.
FRCDIV<2:0>
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0

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