DSPIC33FJ32MC202-I/MM Microchip Technology, DSPIC33FJ32MC202-I/MM Datasheet - Page 177
DSPIC33FJ32MC202-I/MM
Manufacturer Part Number
DSPIC33FJ32MC202-I/MM
Description
IC DSPIC MCU/DSP 32K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32MC202-IMM.pdf
(320 pages)
2.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
3.DSPIC33FJ32MC202-IMM.pdf
(14 pages)
4.DSPIC33FJ32MC302-ISO.pdf
(436 pages)
5.DSPIC33FJ32MC204-IPT.pdf
(304 pages)
Specifications of DSPIC33FJ32MC202-I/MM
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
32KB
Supply Voltage Range
3V To 3.6V
Package
28QFN-S EP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit|6-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ32MC202-I/MM
Manufacturer:
Microchip
Quantity:
1 485
Part Number:
DSPIC33FJ32MC202-I/MM
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- DSPIC33FJ32MC202-IMM PDF datasheet
- DSPIC33FJ32MC202-IMM PDF datasheet #2
- DSPIC33FJ32MC202-IMM PDF datasheet #3
- DSPIC33FJ32MC302-ISO PDF datasheet #4
- DSPIC33FJ32MC204-IPT PDF datasheet #5
- Current page: 177 of 304
- Download datasheet (3Mb)
REGISTER 16-2:
2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-11
bit 10-9
bit 8
bit 7
bit 6-4
bit 3-0
QEOUT
R/W-0
U-0
—
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
Unimplemented: Read as ‘0’
IMV<1:0>: Index Match Value bits – These bits allow the user application to specify the state of the
In 4X Quadrature Count Mode:
In 2X Quadrature Count Mode:
CEID: Count Error Interrupt Disable bit
1 = Interrupts due to count errors are disabled
0 = Interrupts due to count errors are enabled
QEOUT: QEA/QEB/INDX Pin Digital Filter Output Enable bit
1 = Digital filter outputs enabled
0 = Digital filter outputs disabled (normal pin operation)
QECK<2:0>: QEA/QEB/INDX Digital Filter Clock Divide Select Bits
111 = 1:256 Clock Divide
110 = 1:128 Clock Divide
101 = 1:64 Clock Divide
100 = 1:32 Clock Divide
011 = 1:16 Clock Divide
010 = 1:4 Clock Divide
001 = 1:2 Clock Divide
000 = 1:1 Clock Divide
Unimplemented: Read as ‘0’
QEA and QEB input pins during an Index pulse when the POSxCNT register is to be reset.
IMV1= Required State of Phase B input signal for match on index pulse
IMV0= Required State of Phase A input signal for match on index pulse
IMV1= Selects Phase input signal for Index state match (0 = Phase A, 1 = Phase B)
IMV0= Required state of the selected Phase input signal for match on index pulse
U-0
—
DFLTxCON: DIGITAL FILTER CONTROL REGISTER
W = Writable bit
QECK<2:0>
‘1’ = Bit is set
R/W-0
U-0
—
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
R/W-0
U-0
—
IMV<1:0>
x = Bit is unknown
R/W-0
U-0
—
DS70283G-page 177
R/W-0
CEID
U-0
—
bit 8
bit 0
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