PIC18F67J90-I/PT Microchip Technology, PIC18F67J90-I/PT Datasheet - Page 328
PIC18F67J90-I/PT
Manufacturer Part Number
PIC18F67J90-I/PT
Description
IC PIC MCU FLASH 128KB 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F67J90-IPT.pdf
(450 pages)
2.PIC18F67J90-IPT.pdf
(3 pages)
3.PIC18F67J90-IPT.pdf
(10 pages)
4.PIC18F66J90-IPT.pdf
(444 pages)
Specifications of PIC18F67J90-I/PT
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
51
Ram Memory Size
3.8310546875KB
Cpu Speed
48MHz
No. Of Timers
4
No. Of Pwm Channels
2
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3923 B
Interface Type
AUSART, EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
51
Number Of Timers
4
Operating Supply Voltage
2.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67J90-I/PT
Manufacturer:
ON
Quantity:
2 300
Company:
Part Number:
PIC18F67J90-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F87J90 FAMILY
REGISTER 24-9:
TABLE 24-3:
DS39933C-page 326
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-1
bit 0
Note 1:
RCON
WDTCON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Watchdog Timer.
REGSLP
Name
R/W-0
2:
(1)
The REGSLP bit is automatically cleared when a Low-Voltage Detect condition occurs.
This bit has no effect if the Configuration bit, WDTEN, is enabled.
REGSLP
REGSLP: Voltage Regulator Low-Power Operation Enable bit
1 = On-chip regulator enters low-power operation when device enters Sleep mode
0 = On-chip regulator continues to operate normally in Sleep mode
Unimplemented: Read as ‘0’
SWDTEN: Software Controlled Watchdog Timer Enable bit
1 = Watchdog Timer is on
0 = Watchdog Timer is off
IPEN
Bit 7
SUMMARY OF WATCHDOG TIMER REGISTERS
U-0
—
WDTCON: WATCHDOG TIMER CONTROL REGISTER
Bit 6
—
—
W = Writable bit
‘1’ = Bit is set
U-0
—
Bit 5
CM
—
U-0
Bit 4
—
Preliminary
RI
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
Bit 3
TO
—
U-0
—
Bit 2
PD
—
(2)
(1)
U-0
—
Bit 1
POR
—
© 2009 Microchip Technology Inc.
x = Bit is unknown
SWDTEN
U-0
Bit 0
BOR
—
Reset Values
SWDTEN
on page
R/W-0
54
54
bit 0
(2)
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