PIC18F67J90-I/PT Microchip Technology, PIC18F67J90-I/PT Datasheet - Page 434

• Manufacturer Part Number: PIC18F67J90-I/PT
• Description: IC PIC MCU FLASH 128KB 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J90-I/PT

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 51
• Ram Memory Size: 3.8310546875KB
• Cpu Speed: 48MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3923 B
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Operating Supply Voltage: 2.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J90 FAMILY
FSCM. See Fail-Safe Clock Monitor.
G
GOTO................................................................................ 354
H
Hardware Multiplier ............................................................. 93
I
I/O Ports ............................................................................ 111
I
DS39933C-page 432
2
C Mode (MSSP) ............................................................. 214
Erasing ........................................................................ 88
Operation During Code-Protect .................................. 92
Reading....................................................................... 87
Table Pointer
Table Pointer Boundaries ........................................... 86
Table Reads and Table Writes ................................... 83
Write Sequence .......................................................... 89
Write Sequence (Word Programming) ........................ 91
Writing ......................................................................... 89
8 x 8 Multiplication Algorithms .................................... 93
Operation .................................................................... 93
Performance Comparison (table) ................................ 93
Input Voltage Considerations .................................... 111
Open-Drain Outputs .................................................. 112
Output Pin Drive........................................................ 111
Pin Capabilities ......................................................... 111
Pull-up Configuration ................................................ 112
Acknowledge Sequence Timing................................ 242
Associated Registers ................................................ 248
Baud Rate Generator ................................................ 235
Bus Collision
Clock Arbitration........................................................ 236
Clock Stretching ........................................................ 228
Clock Synchronization and the CKP Bit .................... 229
Effects of a Reset...................................................... 243
General Call Address Support .................................. 232
I
Master Mode ............................................................. 233
Multi-Master Communication, Bus Collision
Multi-Master Mode .................................................... 243
Operation .................................................................. 219
Read/Write Bit Information (R/W Bit) ................ 219, 221
Registers ................................................................... 214
Serial Clock (SCK/SCL) ............................................ 221
Slave Mode ............................................................... 219
2
C Clock Rate w/BRG .............................................. 235
Boundaries Based on Operation......................... 86
Unexpected Termination..................................... 92
Write Verify ......................................................... 92
During a Repeated Start Condition ................... 246
During a Stop Condition.................................... 247
10-Bit Slave Receive Mode (SEN = 1).............. 228
10-Bit Slave Transmit Mode.............................. 228
7-Bit Slave Receive Mode (SEN = 1)................ 228
7-Bit Slave Transmit Mode................................ 228
Baud Rate Generator........................................ 235
Operation .......................................................... 234
Reception.......................................................... 239
Repeated Start Condition Timing...................... 238
Start Condition Timing ...................................... 237
Transmission..................................................... 239
and Arbitration................................................... 243
Address Masking .............................................. 220
Addressing ........................................................ 219
Reception.......................................................... 221
Transmission..................................................... 221
Preliminary
INCF ................................................................................. 354
INCFSZ............................................................................. 355
In-Circuit Debugger........................................................... 332
In-Circuit Serial Programming (ICSP)....................... 319, 332
Indexed Literal Offset Addressing
Indexed Literal Offset Mode.............................................. 380
Indirect Addressing ............................................................. 77
INFSNZ............................................................................. 355
Initialization Conditions for all Registers ....................... 53–58
Instruction Cycle ................................................................. 64
Instruction Set................................................................... 333
Sleep Operation........................................................ 243
Stop Condition Timing .............................................. 242
and Standard PIC18 Instructions.............................. 380
Clocking Scheme........................................................ 64
Flow/Pipelining............................................................ 64
ADDLW..................................................................... 339
ADDWF..................................................................... 339
ADDWF (Indexed Literal Offset Mode) ..................... 381
ADDWFC .................................................................. 340
ANDLW..................................................................... 340
ANDWF..................................................................... 341
BC............................................................................. 341
BCF .......................................................................... 342
BN............................................................................. 342
BNC .......................................................................... 343
BNN .......................................................................... 343
BNOV ....................................................................... 344
BNZ .......................................................................... 344
BOV .......................................................................... 347
BRA .......................................................................... 345
BSF........................................................................... 345
BSF (Indexed Literal Offset Mode) ........................... 381
BTFSC ...................................................................... 346
BTFSS ...................................................................... 346
BTG .......................................................................... 347
BZ ............................................................................. 348
CALL......................................................................... 348
CLRF ........................................................................ 349
CLRWDT .................................................................. 349
COMF ....................................................................... 350
CPFSEQ ................................................................... 350
CPFSGT ................................................................... 351
CPFSLT .................................................................... 351
DAW ......................................................................... 352
DCFSNZ ................................................................... 353
DECF ........................................................................ 352
DECFSZ ................................................................... 353
Extended Instructions ............................................... 375
General Format......................................................... 335
GOTO ....................................................................... 354
INCF ......................................................................... 354
INCFSZ..................................................................... 355
INFSNZ..................................................................... 355
IORLW ...................................................................... 356
IORWF...................................................................... 356
LFSR ........................................................................ 357
MOVF ....................................................................... 357
MOVFF ..................................................................... 358
MOVLB ..................................................................... 358
MOVLW .................................................................... 359
MOVWF .................................................................... 359
Considerations when Enabling ......................... 380
Syntax............................................................... 375
Use with MPLAB IDE Tools .............................. 382
© 2009 Microchip Technology Inc.