PIC18F47J13-I/ML Microchip Technology, PIC18F47J13-I/ML Datasheet - Page 227

IC PIC MCU 128KB FLASH 44QFN

PIC18F47J13-I/ML

Manufacturer Part Number
PIC18F47J13-I/ML
Description
IC PIC MCU 128KB FLASH 44QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F47J13-I/ML

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
34
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
QFN
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
25
Number Of Timers
8
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DM164128, DM180021, DM183026-2, DV164131, MA180030, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
15.5.2
The Timer3/5 gate source can be selected from one of
four different sources. Source selection is controlled by
the TxGSS<1:0> bits (TxGCON<1:0>). The polarity for
each available source is also selectable and is
controlled by the TxGPOL bit (TxGCON<6>).
TABLE 15-2:
15.5.2.1
The TxG pin is one source for Timer3/5 gate control. It
can be used to supply an external source to the gate
circuitry.
FIGURE 15-3:
 2010 Microchip Technology Inc.
TxGSS<1:0>
TMRxGE
TxGPOL
Timer3/5
TxGVAL
TxG_IN
TxGTM
TxCKI
00
01
10
11
TIMER3/5 GATE SOURCE
SELECTION
TxG Pin Gate Operation
TxG timer gate pin
TMR4/6 matches PR4/6
Comparator 1 output
Comparator 2 output
TIMER3/5 GATE SOURCES
N
TIMER3/5 GATE TOGGLE MODE
Timerx Gate Source
N + 1 N + 2 N + 3
Preliminary
PIC18F47J13 FAMILY
15.5.2.2
The TMR4/6 register will increment until it matches the
value in the PR4/6 register. On the very next increment
cycle, TMR4/6 will be reset to 00h. When this Reset
occurs, a low-to-high pulse will automatically be
generated and internally supplied to the Timer3/5 gate
circuitry.
15.5.3
When Timer3/5 Gate Toggle mode is enabled, it is
possible to measure the full cycle length of a Timer3/5
gate signal, as opposed to the duration of a single level
pulse.
The Timer1 gate source is routed through a flip-flop that
changes state on every incrementing edge of the
signal. (For timing details, see Figure 15-3.)
The TxGVAL bit will indicate when the Toggled mode is
active and the timer is counting.
Timer3/5 Gate Toggle mode is enabled by setting the
TxGTM bit (TxGCON<5>). When the TxGTM bit is
cleared, the flip-flop is cleared and held clear. This is
necessary in order to control which edge is measured.
N + 4
TIMER3/5 GATE-TOGGLE MODE
Timer4/6 Match Gate Operation
N + 5 N + 6 N + 7
DS39974A-page 227
N + 8

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