PIC18F8410-I/PT Microchip Technology, PIC18F8410-I/PT Datasheet - Page 223

• Manufacturer Part Number: PIC18F8410-I/PT
• Description: IC PIC MCU FLASH 8KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F8410-I/PT

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 70
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 5
• Interface: I2C, SPI, USART
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C, EUSART, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

FIGURE 17-7:
TABLE 17-6:
© 2007 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
RCSTA1
RCREG1
TXSTA1
BAUDCON1
SPBRGH1
SPBRG1
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
Name
Note:
RX1 (pin)
Rcv Shift Reg
Rcv Buffer Reg
RCREG1
Read Rcv
Buffer Reg
RC1IF
(Interrupt Flag)
OERR bit
CREN bit
This timing diagram shows three words appearing on the RX1 input. The RCREG1 (Receive Buffer) is read after the third word causing
the OERR (Overrun) bit to be set.
EUSART1 Receive Register
EUSART1 Baud Rate Generator Register High Byte
EUSART1 Baud Rate Generator Register Low Byte
GIE/GIEH PEIE/GIEL TMR0IE
ABDOVF
PSPIF
PSPIE
PSPIP
CSRC
SPEN
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Bit 7
ASYNCHRONOUS RECEPTION
Start
bit
bit 0
RCIDL
ADIF
ADIE
ADIP
Bit 6
RX9
TX9
bit 1
RC1IE
RC1IP
RC1IF
SREN
TXEN
Bit 5
—
PIC18F6310/6410/8310/8410
bit 7/8
Preliminary
Stop
INT0IE
TX1IF
TX1IE
TX1IP
CREN
SYNC
SCKP
bit
Bit 4
Word 1
RCREG1
Start
bit
ADDEN
SENDB
bit 0
BRG16
SSPIE
SSPIP
SSPIF
RBIE
Bit 3
TMR0IF
CCP1IE
CCP1IP
CCP1IF
bit 7/8
BRGH
Word 2
RCREG1
FERR
Bit 2
—
Stop
bit
TMR2IE
TMR2IP
TMR2IF
INT0IF
OERR
TRMT
Start
WUE
Bit 1
bit
TMR1IF
TMR1IE
TMR1IP
ABDEN
RX9D
TX9D
bit 7/8
RBIF
DS39635B-page 221
Bit 0
Stop
bit
on Page
Values
Reset
57
59
59
59
59
59
59
60
60
59