PIC24FJ128GA010-I/PT Microchip Technology, PIC24FJ128GA010-I/PT Datasheet - Page 118

IC PIC MCU FLASH 128K 100TQFP

PIC24FJ128GA010-I/PT

Manufacturer Part Number
PIC24FJ128GA010-I/PT
Description
IC PIC MCU FLASH 128K 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ128GA010-I/PT

Core Size
16-Bit
Program Memory Size
128KB (43K x 24)
Core Processor
PIC
Speed
16MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
84
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Controller Family/series
PIC24
No. Of I/o's
84
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
No. Of Pwm Channels
5
Embedded Interface Type
EUART, I2C, PSP, SPI
Rohs Compliant
Yes
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
SPI, I2C, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Package
100TQFP
Device Core
PIC
Family Name
PIC24
Maximum Speed
16 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164333 - MODULE SKT FOR PM3 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Quantity
Price
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PIC24FJ128GA010-I/PT
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PIC24FJ128GA FAMILY
To set up the SPI module for the Enhanced Buffer
Master mode of operation:
1.
2.
3.
4.
5.
6.
FIGURE 14-1:
DS39747C-page 116
a)
b)
c)
Write the desired settings to the SPIxCON1 and
SPIxCON2
(SPIxCON1<5>) = 1.
Select Enhanced Buffer mode by setting the
SPIBEN bit (SPIxCON2<0>).
Enable SPI operation by setting the SPIEN bit
(SPIxSTAT<15>).
Write the data to be transmitted to the SPIxBUF
register. Transmission (and reception) will start
as soon as data is written to the SPIxBUF
register.
If using interrupts:
Clear the SPIROV bit (SPIxSTAT<6>).
Note 1: In Standard modes, data is transferred directly between SPIxSR and SPIxBUF.
SDOx
SCKx
SDIx
SSx
Clear the SPIxIF bit in the respective IFSn
register.
Set the SPIxIE bit in the respective IECn
register.
Write the SPIxIP bits in the respective IPCn
register.
Read SPIxBUF
Control
Sync
Transfer
registers
SPI MODULE BLOCK DIAGRAM
bit0
8-Level FIFO Buffer
(Enhanced Modes)
SPIxBUF
with
SPIxSR
Control
Clock
Shift Control
(1)
MSTEN
Transfer
Write SPIxBUF
Preliminary
Select
Edge
To set up the SPI module for the Enhanced Buffer
Slave mode of operation:
1.
2.
3.
4.
5.
6.
7.
8.
16
Clear the SPIxBUF register.
If using interrupts:
• Clear the SPIxIF bit in the respective IFSn
• Set the SPIxIE bit in the respective IECn
• Write the SPIxIP bits in the respective IPCn
Write the desired settings to the SPIxCON1 and
SPIxCON2
(SPIxCON1<5>) = 0.
Clear the SMP bit.
If the CKE bit is set, then the SSEN bit must be
set, thus enabling the SSx pin.
Clear the SPIROV bit (SPIxSTAT<6>).
Select Enhanced Buffer mode by setting the
SPIBEN bit (SPIxCON2<0>).
Enable SPI operation by setting the SPIEN bit
(SPIxSTAT<15>).
Secondary
register.
register.
register to set the interrupt priority.
Prescaler
1:1 to 1:8
Internal Data Bus
registers
1:1/4/16/64
Prescaler
Primary
© 2006 Microchip Technology Inc.
SPIxCON1<1:0>
SPIxCON1<4:2>
Enable
Master Clock
with
F
CY
MSTEN

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