PIC24FJ128GA010-I/PT Microchip Technology, PIC24FJ128GA010-I/PT Datasheet - Page 39

• Manufacturer Part Number: PIC24FJ128GA010-I/PT
• Description: IC PIC MCU FLASH 128K 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GA010-I/PT

• Core Size: 16-Bit
• Program Memory Size: 128KB (43K x 24)
• Core Processor: PIC
• Speed: 16MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 84
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• No. Of Pwm Channels: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC24
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164333 - MODULE SKT FOR PM3 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 3-20:
TABLE 3-21:
TABLE 3-22:
TABLE 3-23:
TRISE
PORTE
LATE
ODCE
Legend:
Note
File Name
File Name
TRISF
PORTF
LATF
ODCF
Legend:
Note
File Name
TRISG
PORTG
LATG
ODCG
Legend:
Note
File Name
PADCFG1
Legend:
1:
1:
2:
1:
2:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for 100-pin devices.
Implemented in 80-pin and 100-pin devices only.
Addr
02DA
02DC
Addr
02DE
02E0
02E2
06DE
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for 100-pin devices.
Implemented in 100-pin devices only.
Implemented in 80-pin and 100-pin devices only.
Addr
02E4
02E6
02E8
06E4
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for 100-pin devices.
Implemented in 100-pin devices only
Implemented in 80-pin and 100-pin devices only.
Addr
02FC
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal for 100-pin devices.
02D8
06D8
PORTE REGISTER MAP
PORTF REGISTER MAP
PORTG REGISTER MAP
TRISG15
PAD CONFIGURATION MAP
LATG15
ODG15
Bit 15
Bit 15
RG15
Bit 15
Bit 15
—
—
—
—
—
—
—
—
—
(1)
(1)
(1)
(1)
Bit 14
TRISG14
Bit 14
LATG14
ODG14
RG14
—
—
—
—
Bit 14
Bit 14
—
—
—
—
—
(1)
(1)
(1)
(1)
TRISF13
LATF13
ODF13
RG13
Bit 13
Bit 13
TRISG13
LATG13
ODG13
—
—
—
—
RG13
Bit 13
Bit 13
(1)
—
(1)
(1)
(1)
(1)
(1)
(1)
(1)
TRISF12
LATF12
ODF12
RG12
Bit 12
Bit 12
TRISG12
—
—
—
—
LATG12
ODG12
RG12
Bit 12
Bit 12
(1)
(1)
(1)
—
(1)
(1)
(1)
(1)
(1
Bit 11
Bit 11
—
—
—
—
—
—
—
—
Bit 11
Bit 11
—
—
—
—
—
Bit 10
Bit 10
—
—
—
—
—
—
—
—
Bit 10
Bit 10
—
—
—
—
—
TRISE9
LATE9
ODE9
RE9
Bit 9
Bit 9
TRISG9
—
—
—
—
LATG9
ODG9
Bit 9
Bit 9
RG9
—
(1)
(1)
(1)
(1)
TRISF8
TRISE8
LATF8
LATE8
ODE8
ODF8
RF8
RE8
Bit 8
Bit 8
TRISG8
LATG8
ODG8
Bit 8
Bit 8
RG8
—
(1)
(2)
(2)
(1)
(1)
(2)
(1)
(2)
TRISF7
LATF7
ODF7
TRISE7
LATE7
RF7
ODE7
Bit 7
Bit 7
TRISG7
RE7
LATG7
ODG7
Bit 7
Bit 7
RG7
—
(2)
(2)
(2)
(2)
TRISE6
TRISF6
LATE6
LATF6
ODE6
ODF6
TRISG6
Bit 6
Bit 6
LATG6
RE6
RF6
ODG6
Bit 6
Bit 6
RG6
—
TRISE5
TRISF5
LATE5
ODE5
LATF5
ODF5
Bit 5
Bit 5
Bit 5
RE5
RF5
Bit 5
—
—
—
—
—
TRISE4
TRISF4
LATE4
LATF4
Bit 4
ODE4
ODF4
Bit 4
Bit 4
Bit 4
RE4
RF4
—
—
—
—
—
TRISE3
TRISF3
Bit 3
TRISG3
LATE3
LATF3
LATG3
ODE3
ODF3
ODG3
Bit 3
Bit 3
Bit 3
—
RE3
RF3
RG3
Bit 2
TRISE2
TRISF2
TRISG2
LATE2
LATF2
ODE2
ODF2
LATG2
—
ODG2
Bit 2
Bit 2
Bit 2
RE2
RF2
RG2
RTSECSEL
TRISG1
LATG1
Bit 1
TRISE1
TRISF1
ODG1
LATE1
LATF1
ODE1
ODF1
RG1
Bit 1
Bit 1
Bit 1
RE1
RF1
(2)
(2)
(2)
(2)
PMPTTL
TRISG0
LATG0
TRISE0
TRISF0
ODG0
LATE0
LATF0
Bit 0
ODE0
ODF0
RG0
Bit 0
Bit 0
Bit 0
RE0
RF0
(2)
(2)
(2)
(2)
Resets
Resets
Resets
Resets
0000
03FF
xxxx
xxxx
0000
F3CF
xxxx
xxxx
0000
31FF
xxxx
xxxx
0000
All
All
All
All