PIC24FJ128GA010-I/PT Microchip Technology, PIC24FJ128GA010-I/PT Datasheet - Page 127

• Manufacturer Part Number: PIC24FJ128GA010-I/PT
• Description: IC PIC MCU FLASH 128K 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GA010-I/PT

• Core Size: 16-Bit
• Program Memory Size: 128KB (43K x 24)
• Core Processor: PIC
• Speed: 16MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 84
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• No. Of Pwm Channels: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC24
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164333 - MODULE SKT FOR PM3 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

15.2
To compute the Baud Rate Generator reload value, use
the following equation:
EQUATION 15-1:
TABLE 15-1:
© 2006 Microchip Technology Inc.
Legend: Shaded rows represent invalid reload values for a given F
Note 1:
Note 1: Based on T
2:
3:
4:
Required
100 kHz
100 kHz
100 kHz
400 kHz
400 kHz
400 kHz
400 kHz
System
Setting Baud Rate When
Operating as a Bus Master
1 MHz
1 MHz
1 MHz
F
PLL are disabled.
SCL
Based on T
This is closest value to 400 kHz for this value of F
F
I2CxBRG cannot have a value of less than 2.
CY
or
F
I2CxBRG
= 2 MHz is the minimum input clock frequency to have F
SCL
I
2
(1)
C™ CLOCK RATES
=
CY
CY
--------------------------------------------- -
2
⋅
=
= F
= F
(
I2CxBRG
⎛
⎝
------------------ -
2 F
OSC
OSC
F
⋅
F
CY
CY
16 MHz
16 MHz
16 MHz
8 MHz
4 MHz
8 MHz
4 MHz
2 MHz
8 MHz
4 MHz
/2, Doze mode and PLL are disabled.
SCL
/2, Doze mode and
F
CY
⎞
⎠
+
–
1
)
1
(1)
Preliminary
(Decimal)
PIC24FJ128GA FAMILY
79
39
19
19
9
4
2
7
3
1
I2CxBRG Value
CY
15.3
The I2CxMSK register (Register 15-3) designates
address bit positions as “don’t care” for both 7-bit and
10-bit Address modes. Setting a particular bit location
(= 1) in the I2CxMSK register causes the slave module
to respond whether the corresponding address bit
value is a ‘0’ or ‘1’. For example, when I2CxMSK is set
to ‘00100000’, the slave module will detect both
addresses ‘0000000’ and ‘00100000’.
To enable address masking, the IPMI (Intelligent
Peripheral Management Interface) must be disabled by
clearing the IPMIEN bit (I2CxCON<11>).
.
SCL
(Hexadecimal)
SCL
Slave Address Masking
and F
= 1 MHz.
4F
27
13
13
9
4
2
7
3
1
CY
.
333 kHz
DS39747C-page 125
1 MHz
1 MHz
100 kHz
100 kHz
100 kHz
400 kHz
400 kHz
400 kHz
Actual
1 MHz
F
SCL
(3)
(4)
(2)