DSPIC33FJ64GP802-I/SP Microchip Technology, DSPIC33FJ64GP802-I/SP Datasheet - Page 221
![IC DSPIC MCU/DSP 64K 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
DSPIC33FJ64GP802-I/SP
Manufacturer Part Number
DSPIC33FJ64GP802-I/SP
Description
IC DSPIC MCU/DSP 64K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32GP204-IPT.pdf
(14 pages)
2.DSPIC33FJ32GP302-ISO.pdf
(412 pages)
3.DSPIC33FJ64GP804-IML.pdf
(402 pages)
Specifications of DSPIC33FJ64GP802-I/SP
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
21
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b, D/A 4x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
16 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164338 - MOD SKT PIC24F/DSPIC33F 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64GP802-I/SP
Manufacturer:
NIPPON
Quantity:
43 000
- DSPIC33FJ32GP204-IPT PDF datasheet
- DSPIC33FJ32GP302-ISO PDF datasheet #2
- DSPIC33FJ64GP804-IML PDF datasheet #3
- Current page: 221 of 412
- Download datasheet (6Mb)
19.0
19.1
The Enhanced Controller Area Network (ECAN™)
module is a serial interface, useful for communicating
with other CAN modules or microcontroller devices.
This interface/protocol was designed to allow commu-
nications
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04,
and dsPIC33FJ128GPX02/X04 devices contain up to
two ECAN modules.
The ECAN module is a communication controller imple-
menting the CAN 2.0 A/B protocol, as defined in the
BOSCH CAN specification. The module supports
CAN 1.2, CAN 2.0A, CAN 2.0B Passive and CAN 2.0B
Active versions of the protocol. The module implementa-
tion is a full CAN system. The CAN specification is not
covered within this data sheet. The reader can refer to
the BOSCH CAN specification for further details.
The module features are as follows:
• Implementation of the CAN protocol, CAN 1.2,
• Standard and extended data frames
• 0-8 bytes data length
• Programmable bit rate up to 1 Mbit/sec
• Automatic response to remote transmission
• Up to eight transmit buffers with application speci-
• Up to 32 receive buffers (each buffer can contain
• Up to 16 full (standard/extended identifier)
• Three full acceptance filter masks
• DeviceNet™ addressing support
• Programmable wake-up functionality with
© 2011 Microchip Technology Inc.
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
CAN 2.0A and CAN 2.0B
requests
fied prioritization and abort capability (each buffer
can contain up to 8 bytes of data)
up to 8 bytes of data)
acceptance filters
integrated low-pass filter
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
ENHANCED CAN (ECAN™)
MODULE
Overview
o f t h e d s P I C 3 3 F J 3 2 G P 3 0 2 / 3 0 4 ,
d s P I C 3 3 F J 6 4 G P X 0 2 / X 0 4 ,
dsPIC33FJ128GPX02/X04 families of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to “Section 21. Enhanced
Controller Area Network (ECAN™)”
(DS70185) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip website
(www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to
“Memory Organization”
sheet for device-specific register and bit
information.
within
noisy
environments.
in this data
Section 4.0
a n d
The
• Programmable Loopback mode supports self-test
• Signaling via interrupt capabilities for all CAN
• Programmable clock source
• Programmable link to input capture module (IC2
• Low-power Sleep and Idle mode
The CAN bus module consists of a protocol engine and
message buffering/control. The CAN protocol engine
handles all functions for receiving and transmitting
messages on the CAN bus. Messages are transmitted
by first loading the appropriate data registers. Status
and errors can be checked by reading the appropriate
registers. Any message detected on the CAN bus is
checked for errors and then matched against filters to
see if it should be received and stored in one of the
receive registers.
19.2
The ECAN module transmits various types of frames
which include data messages, or remote transmission
requests initiated by the user, as other frames that are
automatically generated for control purposes. The
following frame types are supported:
• Standard Data Frame: A standard data frame is
• Extended Data Frame: An extended data frame is
• Remote Frame: It is possible for a destination
• Error Frame: An error frame is generated by any
• Overload Frame: An overload frame can be gen-
• Interframe Space: Interframe space separates a
operation
receiver and transmitter error states
for CAN1) for time-stamping and network
synchronization
generated by a node when the node wishes to
transmit data. It includes an
11-bit Standard Identifier (SID), but not an 18-bit
Extended Identifier (EID).
similar to a standard data frame, but includes an
extended identifier as well.
node to request the data from the source. For this
purpose, the destination node sends a remote
frame with an identifier that matches the identifier
of the required data frame. The appropriate data
source node sends a data frame as a response to
this remote request.
node that detects a bus error. An error frame con-
sists of two fields: an error flag field and an error
delimiter field.
erated by a node as a result of two conditions.
First, the node detects a dominant bit during inter-
frame space which is an illegal condition. Second,
due to internal conditions, the node is not yet able
to start reception of the next message. A node
can generate a maximum of 2 sequential overload
frames to delay the start of the next message.
proceeding frame (of whatever type) from a
following data or remote frame.
Frame Types
DS70292E-page 221
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