PIC18F4320-I/P Microchip Technology, PIC18F4320-I/P Datasheet - Page 104

• Manufacturer Part Number: PIC18F4320-I/P
• Description: IC MCU FLASH 4KX16 A/D 40-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4320-I/P

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/I2C/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2220/2320/4220/4320
FIGURE 10-2:
FIGURE 10-3:
DS39599G-page 102
RD
TRISA
RA6 Enable
Data
Bus
RD LATA
WR LATA
or
PORTA
WR
TRISA
ECIO or
RCIO
Enable
RD PORTA
Note 1:
Note 1:
RD LATA
Data
Bus
WR LATA
or
PORTA
WR TRISA
Analog
Input
Mode
RD TRISA
RD PORTA
To A/D Converter and LVD Modules
SS Input (RA5 only)
I/O pins have protection diodes to V
I/O pins have protection diodes to V
TRIS Latch
Data Latch
D
D
CK
CK
TRIS Latch
Data Latch
D
D
CK
CK
Q
Q
Q
Q
Q
Q
Q
Q
BLOCK DIAGRAM OF
RA3:RA0 AND RA5 PINS
BLOCK DIAGRAM OF
RA6 PIN
Q
Q
EN
D
DD
EN
DD
V
V
D
N
P
SS
and V
DD
V
V
P
N
and V
SS
DD
TTL
Input
Buffer
I/O pin
SS
I/O pin
SS
TTL
Input
Buffer
.
.
(1)
(1)
FIGURE 10-4:
FIGURE 10-5:
RD
TRISA
RA7 Enable
Data
Bus
RD LATA
WR LATA
or
PORTA
WR
TRISA
RA7
Enable
RD PORTA
Note 1:
RD LATA
Data
Bus
RD PORTA
WR LATA
or
PORTA
WR TRISA
RD TRISA
Note 1:
TMR0 Clock Input
I/O pins have protection diodes to V
I/O pins have protection diodes to V
TRIS Latch
Data Latch
D
D
CK
CK
TRIS Latch
Data Latch
D
D
CK
CK
Q
Q
Q
Q
BLOCK DIAGRAM OF
RA4/T0CKI PIN
BLOCK DIAGRAM OF
RA7 PIN
Q
Q
Q
Q
© 2007 Microchip Technology Inc.
Q
Q
EN
EN
Schmitt
Trigger
Input
Buffer
D
DD
V
EN
DD
N
D
SS
To Oscillator
and V
V
V
P
N
and V
DD
SS
SS
I/O pin
I/O pin
SS
TTL
Input
Buffer
.
.
(1)
(1)