PIC18F4320-I/P Microchip Technology, PIC18F4320-I/P Datasheet - Page 112

• Manufacturer Part Number: PIC18F4320-I/P
• Description: IC MCU FLASH 4KX16 A/D 40-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4320-I/P

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/I2C/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2220/2320/4220/4320
FIGURE 10-12:
TABLE 10-7:
TABLE 10-8:
DS39599G-page 110
PORTD
LATD
TRISD
TRISE
CCP1CON
Legend:
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5/P1B
RD6/PSP6/P1C
RD7/PSP7/P1D
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1:
Name
Name
x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
LATD Data Latch Register
PORTD Data Direction Register
P1M1
Bit 7
RD7
IBF
PORTD FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Note 1:
PSPMODE
Data Bus
WR LATD
or PORTD
RD PORTD
PORTD/CCP1 Select
RD LATD
RD TRISD
WR TRISD
PSP Read
PSP Write
Bit#
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
BLOCK DIAGRAM OF RD4:RD0 PINS
P1M0
Bit 6
RD6
OBF
I/O pins have diode protection to V
Buffer Type
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
DC1B1
IBOV
Bit 5
RD5
TRIS Latch
Data Latch
D
D
CK
CK
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Q
Q
PSPMODE
Input/output port pin or Parallel Slave Port bit 0.
Input/output port pin or Parallel Slave Port bit 1.
Input/output port pin or Parallel Slave Port bit 2.
Input/output port pin or Parallel Slave Port bit 3.
Input/output port pin or Parallel Slave Port bit 4.
Input/output port pin, Parallel Slave Port bit 5 or Enhanced PWM output P1B.
Input/output port pin, Parallel Slave Port bit 6 or Enhanced PWM output P1C.
Input/output port pin, Parallel Slave Port bit 7 or Enhanced PWM output P1D.
Q
Q
DC1B0
Bit 4
RD4
CCP1M3 CCP1M2 CCP1M1 CCP1M0
DD
1
0
Bit 3
RD3
and V
—
0
1
SS
Q
PORTE Data Direction bits
.
EN
Bit 2
RD2
EN
D
Bit 1
RD1
Function
1
0
TTL Buffer
Bit 0
RD0
V
P
N
Schmitt Trigger
Input Buffer
V
© 2007 Microchip Technology Inc.
DD
SS
xxxx xxxx
xxxx xxxx
1111 1111
0000 -111
0000 0000
POR, BOR
Value on
I/O pin
uuuu uuuu
uuuu uuuu
1111 1111
0000 -111
0000 0000
(1)
Value on
all other
Resets