DSPIC33FJ128GP706-I/PT Microchip Technology, DSPIC33FJ128GP706-I/PT Datasheet - Page 171

• Manufacturer Part Number: DSPIC33FJ128GP706-I/PT
• Description: IC DSPIC MCU/DSP 128K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128GP706-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (128K x 8)
• Package / Case: 64-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 85
• Data Ram Size: 16 KB
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Data Rom Size: 4096 B
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM300019 - BOARD DEMO DSPICDEM 80L STARTERDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13.0
The input capture module is useful in applications
requiring frequency (period) and pulse measurement.
The dsPIC33F devices support up to eight input
capture channels.
The input capture module captures the 16-bit value of
the selected Time Base register when an event occurs
at the ICx pin. The events that cause a capture event
are listed below in three categories:
1.
2.
3.
FIGURE 13-1:
© 2006 Microchip Technology Inc.
Note:
-Capture timer value on every 4th rising edge
-Capture timer value on every 16th rising
Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.
Simple Capture Event modes
-Capture timer value on every falling edge of
-Capture timer value on every rising edge of
Capture timer value on every edge (rising and
falling)
Prescaler Capture Event modes
ICx Pin
input at ICx pin
input at ICx pin
of input at ICx pin
edge of input at ICx pin
INPUT CAPTURE
This data sheet summarizes the features
of this group of dsPIC33F devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “dsPIC30F
Family Reference Manual” (DS70046).
Prescaler
(1, 4, 16)
Counter
3
INPUT CAPTURE BLOCK DIAGRAM
System Bus
ICxCON
ICM<2:0> (ICxCON<2:0>)
ICOV, ICBNE (ICxCON<4:3>)
Mode Select
Edge Detection Logic
Clock Synchronizer
ICxI<1:0>
and
Preliminary
(in IFSn Register)
Set Flag ICxIF
Interrupt
Logic
Each input capture channel can select between one of
two 16-bit timers (Timer2 or Timer3) for the time base.
The selected timer can use either an internal or
external clock.
Other operational features include:
• Device wake-up from capture pin during CPU
• Interrupt on input capture event
• 4-word FIFO buffer for capture values
• Input capture can also be used to provide
Sleep and Idle modes
- Interrupt optionally generated after 1, 2, 3 or
additional sources of external interrupts
Note:
4 buffer locations are filled
Logic
FIFO
R/W
Only IC1 and IC2 can trigger a DMA data
transfer. If DMA data transfers are
required, the FIFO buffer size must be set
to 1 (ICI<1:0> = 00).
From 16-bit Timers
TMRy TMRz
dsPIC33F
1
ICxBUF
16
0
DS70165D-page 169
16
ICTMR
(ICxCON<7>)