AT89C5131A-S3SUM Atmel, AT89C5131A-S3SUM Datasheet - Page 153
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AT89C5131A-S3SUM
Manufacturer Part Number
AT89C5131A-S3SUM
Description
IC 8051 MCU FLASH 32K USB 52PLCC
Manufacturer
Atmel
Series
AT89C513xr
Datasheet
1.AT89C5130A-PUTUM.pdf
(188 pages)
Specifications of AT89C5131A-S3SUM
Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
2-Wire, EUART, SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
34
Number Of Timers
16 bit
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89STK-05
Minimum Operating Temperature
- 40 C
Package
52PLCC
Device Core
8051
Family Name
89C
Maximum Speed
48 MHz
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89C5131A-S3SUM
Manufacturer:
ATMEL
Quantity:
46
23. Power Monitor
23.1
4337K–USB–04/08
Description
The POR/PFD function monitors the internal power-supply of the CPU core memories and the
peripherals, and if needed, suspends their activity when the internal power supply falls below a
safety threshold. This is achieved by applying an internal reset to them.
By generating the Reset the Power Monitor insures a correct start up when AT89C5131 is pow-
ered up.
In order to startup and maintain the microcontroller in correct operating mode, V
bilized in the V
compatible with logic level VIH/VIL.
These parameters are controlled during the three phases: power-up, normal operation and
power going down. See Figure 23-1.
Figure 23-1. Power Monitor Block Diagram
Note:
The Voltage regulator generates a regulated internal supply for the CPU core the memories and
the peripherals. Spikes on the external Vcc are smoothed by the voltage regulator.
The Power fail detect monitor the supply generated by the voltage regulator and generate a
reset if this supply falls below a safety threshold as illustrated in the Figure 23-2 below.
RST pin
1. Once XTAL1 High and low levels reach above and below VIH/VIL. a 1024 clock period delay
XTAL1
will extend the reset coming from the Power Fail Detect. If the power falls below the Power Fail
Detect threshold level, the Reset will be applied immediately.
CC
PCA
Watchdog
operating range and the oscillator has to be stabilized with a nominal amplitude
Voltage Regulator
Power Fail Detect
Power On Reset
(1)
Hardware
Watchdog
VCC
Regulated
Supply
Internal Reset
Peripherals
CPU core
Memories
AT89C5130A/31A-M
CC
has to be sta-
153