AT89C5131A-S3SUM Atmel, AT89C5131A-S3SUM Datasheet - Page 34

• Manufacturer Part Number: AT89C5131A-S3SUM
• Description: IC 8051 MCU FLASH 32K USB 52PLCC
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5131A-S3SUM

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: LED, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: 2-Wire, EUART, SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89STK-05
• Minimum Operating Temperature: - 40 C
• Package: 52PLCC
• Device Core: 8051
• Family Name: 89C
• Maximum Speed: 48 MHz
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

8.3.6
8.3.6.1
8.3.6.2
34
AT89C5130A/31A-M
Programming the Flash Spaces
User
Extra Row
Figure 8-5.
The following procedure is used to program the User space and is summarized in Figure 8-6:
Note:
The following procedure is used to program the Extra Row space and is summarized in Figure 8-
6:
• Load data in the column latches from address 0000h to 7FFFh
• Disable the interrupts.
• Launch the programming by writing the data sequence 50h followed by A0h in FCON
• Enable the interrupts.
• Load data in the column latches from address FF80h to FFFFh.
• Disable the interrupts.
• Launch the programming by writing the data sequence 52h followed by A2h in FCON
• Enable the interrupts.
register.
The end of the programming indicated by the FBUSY flag cleared.
register.
The end of the programming indicated by the FBUSY flag cleared.
1. The last page address used when loading the column latch is the one used to select the page
programming address.
Column Latches Loading Procedure
Column Latches Mapping
Exec: MOVX @DPTR, A
Data memory Mapping
Column Latches
DPTR = Address
ACC = Data
Data Load
Last Byte
Loading
to load?
FPS = 1
FPS = 0
(1)
.
4337K–USB–04/08