AT89C5131A-S3SUM Atmel, AT89C5131A-S3SUM Datasheet - Page 59

• Manufacturer Part Number: AT89C5131A-S3SUM
• Description: IC 8051 MCU FLASH 32K USB 52PLCC
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5131A-S3SUM

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: LED, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: 2-Wire, EUART, SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89STK-05
• Minimum Operating Temperature: - 40 C
• Package: 52PLCC
• Device Core: 8051
• Family Name: 89C
• Maximum Speed: 48 MHz
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Figure 14-1. PCA Timer/Counter
4337K–USB–04/08
F
F
Idle
CLK PERIPH
CLK PERIPH
T0 OVF
P1.2
/6
/2
Table 14-1.
Number
CIDL
Bit
7
7
6
5
4
3
2
1
0
CIDL
CF
WDTE
Mnemonic
CMOD Register
CMOD - PCA Counter Mode Register (D9h)
WDTE
6
CPS1
CPS0
CIDL
ECF
Bit
WDTE
-
-
-
CR
Description
Counter Idle Control
Cleared to program the PCA Counter to continue functioning during idle Mode.
Set to program PCA to be gated off during idle.
Watchdog Timer Enable
Cleared to disable Watchdog Timer function on PCA Module 4.
Set to enable Watchdog Timer function on PCA Module 4.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
PCA Count Pulse Select
CPS1CPS0
0
0
1
1
PCA Enable Counter Overflow Interrupt
Cleared to disable CF bit in CCON to inhibit an interrupt.
Set to enable CF bit in CCON to generate an interrupt.
5
-
CCF4 CCF3 CCF2 CCF1 CCF0
0
1
0
1
4
-
Selected PCA input
Internal clock f
Internal clock f
Timer 0 Overflow
External clock at ECI/P1.2 pin (max rate = f
CPS1 CPS0
CH
16 Bit Up Counter
3
-
CLK PERIPH
CLK PERIPH
ECF
CL
/6
/2
AT89C5130A/31A-M
CPS1
CMOD
0xD9
CCON
0xD8
2
overflow
CPS0
To PCA
modules
1
CLK PERIPH
It
ECF
/ 4)
0
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