DSPIC30F5013-20I/PT Microchip Technology, DSPIC30F5013-20I/PT Datasheet - Page 107

• Manufacturer Part Number: DSPIC30F5013-20I/PT
• Description: IC DSPIC MCU/DSP 66K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F5013-20I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 66KB (22K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 66KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 68
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPDM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC30F007 - MODULE SKT FOR DSPIC30F 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F501320IPT

TABLE 16-1:
TABLE 16-2:
SFR Name Addr.
U1MODE
U1STA
U1TXREG
U1RXREG
U1BRG
Legend:
Note
U2MODE
U2STA
U2TXREG
U2RXREG
U2BRG
Legend:
Note
Name
SFR
1:
1:
020C
020E
Addr.
021C
0210
0212
0214
0216
0218
021A
021E
u = uninitialized bit; — = unimplemented, read as ‘0’
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
u = uninitialized bit; — = unimplemented, read as ‘0’
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
UARTEN
UTXISEL
UARTEN
UTXISEL
UART1 REGISTER MAP
UART2 REGISTER MAP
Bit 15
Bit 15
—
—
—
—
Bit 14
Bit 14
—
—
—
—
—
—
—
—
USIDL
Bit 13
USIDL
Bit 13
—
—
—
—
—
—
Bit 12
Bit 12
—
—
—
—
—
—
—
—
UTXBRK UTXEN UTXBF
(1)
(1)
UTXBRK UTXEN
Bit 11
Bit 11
—
—
—
—
—
—
Bit 10
Bit 10
—
—
—
—
—
—
Bit 9
UTXBF
—
—
—
Bit 9
—
—
—
Baud Rate Generator Prescaler
Baud Rate Generator Prescaler
TRMT
URX8
UTX8
Bit 8
TRMT
—
UTX8
URX8
Bit 8
—
URXISEL1 URXISEL0 ADDEN
URXISEL1 URXISEL0 ADDEN RIDLE
WAKE
Bit 7
WAKE
Bit 7
LPBACK
LPBACK
Bit 6
Bit 6
ABAUD
Bit 5
ABAUD
Bit 5
Transmit Register
Receive Register
Transmit Register
Receive Register
RIDLE
Bit 4
Bit 4
—
—
PERR
PERR
Bit 3
Bit 3
—
—
PDSEL1 PDSEL0
PDSEL1 PDSEL0 STSEL 0000 0000 0000 0000
FERR
Bit 2
FERR
Bit 2
OERR
OERR
Bit 1
Bit 1
URXDA 0000 0001 0001 0000
URXDA 0000 0001 0001 0000
STSEL 0000 0000 0000 0000
Bit 0
Bit 0
0000 000u uuuu uuuu
0000 0000 0000 0000
0000 0000 0000 0000
0000 000u uuuu uuuu
0000 0000 0000 0000
0000 0000 0000 0000
Reset State
Reset State