DSPIC30F5013-20I/PT Microchip Technology, DSPIC30F5013-20I/PT Datasheet - Page 153

• Manufacturer Part Number: DSPIC30F5013-20I/PT
• Description: IC DSPIC MCU/DSP 66K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F5013-20I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 66KB (22K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 66KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 68
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPDM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC30F007 - MODULE SKT FOR DSPIC30F 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F501320IPT

TABLE 20-7:
TABLE 20-8:
RCON
OSCCON
PMD1
PMD2
Legend:
Note
FOSC
FWDT
FBORPOR
FBS
FSS
FGS
FICD
Legend:
Note
File Name
Name
SFR
1:
2:
3:
1:
Addr.
0740
0742
0770
0772
— = unimplemented, read as ‘0’
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Reset state depends on type of Reset.
Reset state depends on Configuration bits.
— = unimplemented, read as ‘0’
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
F80000
F80002
F80004
F80006
F80008
F8000A
F8000C
Addr.
TRAPR IOPUWR BGST
IC8MD
Bit 15
T5MD
TUN3
SYSTEM INTEGRATION REGISTER MAP
DEVICE CONFIGURATION REGISTER MAP
Bits 23-16
IC7MD
Bit 14
T4MD
TUN2
—
—
—
—
—
—
—
IC6MD IC5MD
Bit 13
T3MD
COSC<1:0>
FWDTEN
MCLREN
Bit 15
FCKSM<1:0>
—
—
—
—
LVDEN
Bit 12
T2MD
Bit 14
IC4MD
Bit 11
TUN1
T1MD
—
—
—
—
—
—
Bit 13
RBS1
RBS1
IC3MD
Bit 10
TUN0
—
—
—
—
—
—
LVDL<3:0>
Bit 12
RBS0
RBS0
IC2MD
—
—
—
—
—
Bit 9
NOSC<1:0>
—
(1)
(1)
Bit 11
DCIMD
IC1MD
—
—
—
—
—
—
—
Bit 8
OC8MD OC7MD
I2CMD
EXTR
Bit 10
Bit 7
POST<1:0>
—
—
—
—
—
—
—
U2MD
SWR
Bit 6
ESS1
Bit 9
—
—
—
—
—
FOS<1:0>
SWDTEN
OC6MD
U1MD
LOCK
Bit 5
ESS0
Bit 8
EBS
—
—
—
—
SPI2MD SPI1MD
OC5MD
WDTO
BOREN
BKBUG
Bit 4
—
Bit 7
—
—
—
—
—
OC4MD OC3MD
SLEEP
Bit 3
CF
Bit 6
COE
—
—
—
—
—
—
C2MD
Bit 2
IDLE
—
Bit 5
FWPSA<1:0>
BORV<1:0>
—
—
—
—
—
LPOSCEN OSWEN
OC2MD
C1MD
Bit 1
BOR
Bit 4
—
—
—
—
—
ADCMD 0000 0000 0000 0000
OC1MD 0000 0000 0000 0000
Bit 3
Bit 0
POR
—
—
—
BSS<2:0>
SSS<2:0>
Bit 2
FWPSB<3:0>
—
—
GSS<1:0>
FPR<3:0>
Reset State
Bit 1
(Note 23
(Note 2)
FPWRT<1:0>
ICS<1:0>
GWRP
BWRP
SWRP
Bit 0