PIC18F4680-I/ML Microchip Technology, PIC18F4680-I/ML Datasheet - Page 132

• Manufacturer Part Number: PIC18F4680-I/ML
• Description: IC MCU FLASH 32KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4680-I/ML

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3328Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: I2C, SPI, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11 bit
• Package: 44QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4680 - BOARD DAUGHTER ICEPIC3444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / Rohs Status: Details

PIC18F2585/2680/4585/4680
TABLE 10-1:
DS39625C-page 130
RA0/AN0/CV
RA1/AN1
RA2/AN2/V
RA3/AN3/V
RA4/T0CKI
RA5/AN4/SS/HLVDIN RA5
OSC2/CLKO/RA6
OSC1/CLKI/RA7
Legend:
Pin Name
REF
REF
PWR = Power Supply; OUT = Output; IN = Input; ANA = Analog Signal; DIG = Digital Output; ST = Schmitt Buffer Input;
TTL = TTL Buffer Input
REF
-
+
PORTA I/O SUMMARY
RA0
AN0
CV
RA1
AN1
RA2
AN2
V
RA3
AN3
V
RA4
T0CKI
AN4
SS
HLVDIN
OSC2
CLKO
RA6
OSC1
CLKI
RA7
Function
REF
REF
REF
-
+
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
TRIS
0
1
1
x
0
1
1
0
1
1
1
0
1
1
1
0
1
1
0
1
1
1
1
x
x
0
1
x
x
0
1
Buffer
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
TTL
DIG
DIG
TTL
DIG
TTL
ST
Preliminary
LATA<0> data output.
PORTA<0> data input.
A/D input channel 0. Enabled on POR, this analog input overrides the
digital input (read as clear – low level).
Comparator voltage reference analog output. Enabling this analog
output overrides the digital I/O (read as clear – low level).
LATA<1> data output.
PORTA<1> data input.
A/D input channel 1. Enabled on POR, this analog input overrides the
digital input (read as clear – low level).
LATA<2> data output.
PORTA<2> data input.
A/D input channel 2. Enabled on POR, this analog input overrides the
digital input (read as clear – low level).
A/D and comparator negative voltage analog input.
LATA<3> data output.
PORTA<3> data input.
A/D input channel 3. Enabled on POR, this analog input overrides the
digital input (read as clear – low level).
A/D and comparator positive voltage analog input.
LATA<4> data output.
PORTA<4> data input.
Timer0 clock input.
LATA<5> data output.
PORTA<5> data input.
A/D input channel 4. Enabled on POR, this analog input overrides the
digital input (read as clear – low level).
Slave select input for MSSP.
High/Low-Voltage Detect external trip point input.
Output connection, selected by FOSC3:FOSC0 Configuration bits.
Enabling OSC2 overrides digital I/O.
Output connection, selected by FOSC3:FOSC0 Configuration bits.
Enabling CLKO overrides digital I/O (F
LATA<6> data output.
PORTA<6> data input.
Main oscillator input connection, determined by FOSC3:FOSC0
Configuration bits. Enabling OSC1 overrides digital I/O.
Main clock input connection, determined by FOSC3:FOSC0
Configuration bits. Enabling CLKI overrides digital I/O.
LATA<7> data output.
PORTA<7> data input.
Description
© 2007 Microchip Technology Inc.
OSC
/4).