PIC18F4680-I/ML Microchip Technology, PIC18F4680-I/ML Datasheet - Page 147

• Manufacturer Part Number: PIC18F4680-I/ML
• Description: IC MCU FLASH 32KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4680-I/ML

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3328Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: I2C, SPI, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11 bit
• Package: 44QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4680 - BOARD DAUGHTER ICEPIC3444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / Rohs Status: Details

FIGURE 10-3:
FIGURE 10-4:
TABLE 10-11: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
© 2007 Microchip Technology Inc.
PORTD
LATD
TRISD
PORTE
LATE
TRISE
INTCON
PIR1
PIE1
IPR1
ADCON1
CMCON
Legend:
Note 1:
Name
PORTD<7:0>
PORTD<7:0>
(1)
(1)
(1)
2:
(1)
(1)
(1)
(1)
PSPIF
PSPIF
— = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.
These registers are available on PIC18F4X8X devices only.
These registers are unimplemented on PIC18F2X8X devices and read as ‘
PORTD Data Latch Register (Read and Write to Data Latch)
PORTD Data Direction Control Register
GIE/GIEH
OBF
OBF
PSPIF
PSPIE
PSPIP
CS
WR
RD
IBF
C2OUT
CS
WR
RD
IBF
Bit 7
RD7
IBF
—
—
—
(2)
(2)
(2)
PARALLEL SLAVE PORT WRITE WAVEFORMS
PARALLEL SLAVE PORT READ WAVEFORMS
Q1
PEIE/GIEL
Q1
C1OUT
ADIF
ADIE
ADIP
Bit 6
RD6
OBF
—
—
—
Q2
Q2
TMR0IE
VCFG1
C2INV
IBOV
RCIF
RCIE
RCIP
Bit 5
RD5
Q3
Q3
—
—
PIC18F2585/2680/4585/4680
Q4
Q4
PSPMODE
Preliminary
VCFG0
INT0IE
C1INV
Bit 4
TXIF
TXIE
TXIP
RD4
—
—
Q1
Q1
PCFG3
Q2
Q2
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
RD3
RE3
CIS
—
—
Q3
Q3
LATE Data Output bits
TMR0IF
CCP1IE
CCP1IP
TRISE2
CCP1IF
PCFG2
Bit 2
RD2
CM2
RE2
Q4
Q4
0
’.
TMR2IF
TMR2IE
TMR2IP
TRISE1
PCFG1
Q1
INT0IF
Q1
Bit 1
CM1
RD1
RE1
Q2
Q2
TMR1IE
TMR1IP
TRISE0
TMR1IF
PCFG0
DS39625C-page 145
RBIF
Bit 0
CM0
RD0
RE0
Q3
Q3
on page
Values
Q4
Reset
Q4
52
52
52
52
52
52
49
52
52
52
50
51