PIC18F4680-I/ML Microchip Technology, PIC18F4680-I/ML Datasheet - Page 307

IC MCU FLASH 32KX16 44QFN

PIC18F4680-I/ML

Manufacturer Part Number
PIC18F4680-I/ML
Description
IC MCU FLASH 32KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4680-I/ML

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
1024Byte
Ram Memory Size
3328Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
44
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
Minimum Operating Temperature
- 40 C
On-chip Adc
11 bit
Package
44QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4680 - BOARD DAUGHTER ICEPIC3444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
 Details
REGISTER 23-45: RXFCONn: RECEIVE FILTER CONTROL REGISTER n [0 ≤ n ≤ 1]
REGISTER 23-46: SDFLC: STANDARD DATA BYTES FILTER LENGTH COUNT REGISTER
© 2007 Microchip Technology Inc.
Note:
RXFCON0
RXFCON1
bit 7-0
bit 7-5
bit 4-0
Registers 23-46 through 23-51are writable
in Configuration mode only.
bit 7
Unimplemented: Read as ‘0’
FLC4:FLC0: Filter Length Count bits
Mode 0:
Not used; forced to ‘00000’.
00000-10010 = 0
If DLC3:DLC0 = 0000 No bits will be compared with incoming data bits
If DLC3:DLC0 = 0001 Up to 8 data bits of RXFnEID<7:0>, as determined by FLC2:FLC0, will
If DLC3:DLC0 = 0010 Up to 16 data bits of RXFnEID<15:0>, as determined by FLC3:FLC0,
If DLC3:DLC0 = 0011 Up to 18 data bits of RXFnEID<17:0>, as determined by FLC4:FLC0,
Legend:
R = Readable bit
-n = Value at POR
bit 7
RXFnEN: Receive Filter n Enable bits
0 = Filter is disabled
1 = Filter is enabled
Legend:
R = Readable bit
-n = Value at POR
RXF15EN
Note 1: This register is available in Mode 1 and 2 only.
RXF7EN
Note 1: This register is available in Mode 1 and 2 only.
R/W-0
R/W-0
U-0
RXF14EN
RXF6EN
R/W-0
R/W-0
U-0
PIC18F2585/2680/4585/4680
18 bits are available for standard data byte filter. Actual number of bits
used depends on DLC3:DLC0 bits (RXBnDLC<3:0> or BnDLC<3:0> if
configured as RX buffer) of message being received.
be compared with the corresponding number of data bits of the
incoming message
will be compared with the corresponding number of data bits of the
incoming message
will be compared with the corresponding number of data bits of the
incoming message
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
RXF13EN RXF12EN RXF11EN RXF10EN RXF9EN
RXF5EN
Preliminary
R/W-1
R/W-0
U-0
RXF4EN
R/W-0
FLC4
R/W-1
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RXF3EN
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-1
R/W-0
FLC3
RXF2EN
R/W-0
R/W-1
R/W-0
FLC2
x = Bit is unknown
x = Bit is unknown
RXF1EN
R/W-0
R/W-1
R/W-0
FLC1
(1)
DS39625C-page 305
(1)
RXF0EN
RXF8EN
R/W-1
R/W-0
R/W-0
FLC0
bit 0
bit 0

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