PIC18F6621-I/PT Microchip Technology, PIC18F6621-I/PT Datasheet - Page 25

• Manufacturer Part Number: PIC18F6621-I/PT
• Description: IC PIC MCU FLASH 32KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6621-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.75K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 53
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3.75KB
• Cpu Speed: 40MHz
• No. Of Timers: 5
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3840 B
• Interface Type: MSSP, SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Details

FIGURE 4-4:
4.5
A data EEPROM address may be read via a sequence
of core instructions (4-bit command, ‘0000’) and then
output on PGD via the 4-bit command, ‘0010’ (Shift Out
Data Holding register). The result may then be immedi-
ately compared to the appropriate data in the program-
mer’s memory for verification. Refer to Section 4.4 for
implementation details of reading data EEPROM.
4.6
The term “Blank Check” means to verify that the device
has no programmed memory cells. All memories must
be verified: code memory, data EEPROM, ID locations,
and configuration bits. The Device ID registers
(3FFFFEh:3FFFFFh) should be ignored.
A “blank” or “erased” memory cell will read as a ‘1’. So,
“Blank Checking” a device merely means to verify that
all bytes read as FFh except the configuration bits.
Unused (reserved) configuration bits will read ‘0’ (pro-
grammed). Refer to Table 5-2 for blank configuration
expect data for the various PIC18F6X2X/8X2X
devices.
Given that “Blank Checking” is merely code and data
EEPROM verification with FFh expect data, refer to
Section 4.4 and Section 4.2 for implementation details.
 2003 Microchip Technology Inc.
PGC
PGD
Verify Data EEPROM
Blank Check
1
0
2
1
3
0
SHIFT OUT DATA HOLDING REGISTER TIMING (0010)
4
0
P5
PGD = Input
1
2
3
4
5
6
7
8
P6
FIGURE 4-5:
9
LSb
P14
10
1
PIC18F6X2X/8X2X
11
2
PGD = Output
Blank Check Device
12
Shift Data Out
3
13
Device
Blank?
4
Abort
Start
Is
14
5
No
15
BLANK CHECK FLOW
6
16
MSb
P5A
Yes
Fetch Next 4-bit Command
1
n
PGD = Input
DS30499B-page 25
2
Continue
n
3
n
4
n