PIC18F8620-I/PT Microchip Technology, PIC18F8620-I/PT Datasheet - Page 152

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PIC18F8620-I/PT

Manufacturer Part Number
PIC18F8620-I/PT
Description
IC MCU FLASH 32KX16 EE 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F8620-I/PT

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
68
Eeprom Memory Size
1024Byte
Ram Memory Size
3.75KB
Cpu Speed
25MHz
No. Of Timers
5
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F8620-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F8620-I/PT
Manufacturer:
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Quantity:
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PIC18F6520/8520/6620/8620/6720/8720
16.1
Each Capture/Compare/PWM module is associated
with a control register (generically, CCPxCON) and a
data register (CCPRx). The data register, in turn, is
comprised of two 8-bit registers: CCPRxL (low byte)
and CCPRxH (high byte). All registers are both
readable and writable.
16.1.1
The CCP modules utilize Timers 1, 2, 3 or 4, depending
on the mode selected. Timer1 and Timer3 are available
to modules in Capture or Compare modes, while
Timer2 and Timer4 are available for modules in PWM
mode.
FIGURE 16-1:
DS39609B-page 150
Timer1 is used for all Capture
and Compare operations for
all CCP modules. Timer2 is
used for PWM operations for
all CCP modules. Modules
may
resource as a common time
base.
Timer3 and Timer4 are not
available.
TMR1
TMR2
T3CCP<2:1> = 00
CCP1
CCP2
CCP3
CCP4
CCP5
share
CCP Module Configuration
CCP MODULES AND TIMER
RESOURCES
either
TMR3
TMR4
CCP AND TIMER INTERCONNECT CONFIGURATIONS
timer
Timer1 and Timer2 are used
for Capture and Compare or
PWM operations for CCP1
only (depending on selected
mode).
All other modules use either
Timer3 or Timer4. Modules
may
resource as a common time
base, if they are in Capture/
Compare or PWM modes.
TMR1
TMR2
CCP1
T3CCP<2:1> = 01
share
either
TMR3
TMR4
CCP2
CCP3
CCP4
CCP5
timer
Timer1 and Timer2 are used
for Capture and Compare or
PWM operations for CCP1
and CCP2 only (depending on
the mode selected for each
module). Both modules may
use a timer as a common time
base if they are both in
Capture/Compare or PWM
modes.
The other modules use either
Timer3 or Timer4. Modules
may
resource as a common time
base if they are in Capture/
Compare or PWM modes.
TABLE 16-1:
The assignment of a particular timer to a module is
determined by the Timer-to-CCP Enable bits in the
T3CON register (Register 14-1). Depending on the
configuration selected, up to four timers may be active
at once, with modules in the same configuration
(Capture/Compare or PWM) sharing timer resources.
The possible configurations are shown in Figure 16-1.
TMR1
TMR2
CCP1
CCP2
T3CCP<2:1> = 10
share
CCP Mode
Compare
Capture
PWM
either
TMR3
TMR4
CCP3
CCP4
CCP5
CCP MODE – TIMER
RESOURCE
timer
 2004 Microchip Technology Inc.
Timer3 is used for all Capture
and Compare operations for
all CCP modules. Timer4 is
used for PWM operations for
all CCP modules. Modules
may
resource as a common time
base.
Timer1 and Timer2 are not
available.
TMR1
TMR2
Timer Resource
Timer1 or Timer3
Timer1 or Timer3
Timer2 or Timer4
T3CCP<2:1> = 11
share
either
TMR3
TMR4
CCP1
CCP2
CCP3
CCP4
CCP5
timer

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