PIC18F6720-I/PT Microchip Technology, PIC18F6720-I/PT Datasheet - Page 259

• Manufacturer Part Number: PIC18F6720-I/PT
• Description: IC MCU FLASH 64KX16 EE 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6720-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Eeprom Size: 1K x 8
• Ram Size: 3.75K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.75 KB
• Interface Type: I2C/SPI/USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

23.4.2
The entire data EEPROM is protected from external
reads and writes by two bits: CPD and WRTD. CPD
inhibits external reads and writes of data EEPROM.
WRTD inhibits external writes to data EEPROM. The
CPU can continue to read and write data EEPROM,
regardless of the protection bit settings.
23.4.3
The configuration registers can be write-protected. The
WRTC bit controls protection of the configuration regis-
ters. In user mode, the WRTC bit is readable only.
WRTC can only be written via ICSP or an external
programmer.
23.5
Eight memory locations (200000h-200007h) are
designated as ID locations, where the user can store
checksum or other code identification numbers. These
locations are accessible during normal execution
through the TBLRD and TBLWT instructions or during
program/verify. The ID locations can be read when the
device is code-protected.
23.6
PIC18FX520/X620/X720 microcontrollers can be seri-
ally programmed while in the end application circuit.
This is simply done with two lines for clock and data
and three other lines for power, ground and the
programming voltage. This allows customers to manu-
facture boards with unprogrammed devices and then
program the microcontroller just before shipping the
product. This also allows the most recent firmware or a
custom firmware to be programmed.
23.7
When the DEBUG bit in the CONFIG4L Configuration
register is programmed to a ‘0’, the In-Circuit Debugger
functionality is enabled. This function allows simple
debugging functions when used with MPLAB
When the microcontroller has this feature enabled,
some of the resources are not available for general
use. Table 23-4 shows which features are consumed
by the background debugger.
 2004 Microchip Technology Inc.
Note:
ID Locations
In-Circuit Debugger
In-Circuit Serial Programming
DATA EEPROM
CODE PROTECTION
CONFIGURATION REGISTER
PROTECTION
When
Programming, verify that power is con-
nected to all V
microcontroller and that all V
pins are grounded.
PIC18F6520/8520/6620/8620/6720/8720
performing
DD
and AV
In-Circuit
DD
SS
pins of the
and AV
®
Serial
IDE.
SS
TABLE 23-4:
To use the In-Circuit Debugger function of the micro-
controller, the design must implement In-Circuit Serial
Programming connections to MCLR/V
RB7 and RB6. This will interface to the In-Circuit
Debugger module available from Microchip or one of
the third party development tool companies.
23.8
The LVP bit in the CONFIG4L Configuration register
enables Low-Voltage ICSP Programming. This mode
allows the microcontroller to be programmed via ICSP
using a V
only means that V
V
voltage. In this mode, the RB5/PGM pin is dedicated to
the programming function and ceases to be a general
purpose I/O pin. During programming, V
the MCLR/V
must be applied to the RB5/PGM pin, provided the LVP
bit is set. The LVP bit defaults to a ‘1’ from the factory.
If Low-Voltage Programming mode is not used, the LVP
bit can be programmed to a ‘0’ and RB5/PGM becomes
a digital I/O pin. However, the LVP bit may only be
programmed when programming is entered with V
on MCLR/V
It should be noted that once the LVP bit is programmed
to ‘0’, only the High-Voltage Programming mode is
available and only High-Voltage Programming mode
can be used to program the device.
When using Low-Voltage ICSP Programming, the part
must be supplied 4.5V to 5.5V if a bulk erase will be
executed. This includes reprogramming of the code-
protect bits from an on state to an off state. For all other
cases of Low-Voltage ICSP, the part may be
programmed at the normal operating voltage. This
means unique user IDs or user code can be
reprogrammed or added.
I/O pins
Stack
Program Memory
Data Memory
IHH
Note 1: The High-Voltage Programming mode is
, but can instead be left at the normal operating
2: While in Low-Voltage ICSP mode, the
3: When using Low-Voltage ICSP Program-
Low-Voltage ICSP Programming
DD
PP
source in the operating voltage range. This
PP
always available, regardless of the state
of the LVP bit, by applying V
MCLR pin.
RB5 pin can no longer be used as a
general purpose I/O pin and should be
held low during normal operation.
ming (LVP) and the pull-ups on PORTB are
enabled, bit 5 in the TRISB register must be
cleared to disable the pull-up on RB5 and
ensure the proper operation of the device.
.
pin. To enter Programming mode, V
DEBUGGER RESOURCES
PP
does not have to be brought to
Last 576 bytes
Last 10 bytes
RB6, RB7
2 levels
DS39609B-page 257
PP
DD
, V
is applied to
IHH
DD
, GND,
to the
IHH
DD