AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 1124

MCU ARM9 324-TFBGA

AT91SAM9G45-CU

Manufacturer Part Number
AT91SAM9G45-CU
Description
MCU ARM9 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91SAM9G45-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
800 MHz
Number Of Programmable I/os
160
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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45.11 Register Configuration Guide
45.11.1
45.11.2
1124
AT91SAM9G45
STN Mode Example
TFT Mode Example
Program the PIO Controller to enable LCD signals.
Enable the LCD controller clock in the Power Management Controller.
STN color(R,G,B) 320*240, 8-bit single scan, 70 frames/sec, Master clock = 60 Mhz
Data rate: 320*240*70*3/8 = 2.016 MHz
HOZVAL= ((3*320)/8) - 1
LINEVAL= 240 -1
CLKVAL = (60 MHz/2.016 MHz) - 1 = 29
LCDCON1= CLKVAL << 12
LCDCON2 = LITTLEENDIAN | SINGLESCAN | STNCOLOR | DISP8BIT| PS8BPP;
LCDTIM1 = 0;
LCDTIM2 = 10 | (10 << 21);
LCDFRMCFG = (HOZVAL << 21) | LINEVAL;
LCDMVAL = 0x80000004;
DMAFRMCFG = (7 << 24) + (320 * 240 * 8) / 32;
This example is based on the NEC TFT color LCD module NL6448BC20-08
TFT 640*480, 16-bit single scan, 60 frames/sec, pixel clock frequency = [21MHz..29MHz] with a
typical value = 25.175 MHz.
The Master clock must be (n + 1)*pixel clock frequency
HOZVAL = 640 - 1
LINEVAL = 480 - 1
If Master clock is 100 MHz
CLKVAL = (100 MHz/ 25.175 MHz) - 1= 3
VFP = (12 -1), VBP = (31-1), VPW = (2-1), VHDLY= (2-1)
HFP = (16-1), HBP = (48 -1), HPW= (96-1)
LCDCON1= CLKVAL << 12
LCDCON2 = LITTLEENDIAN | CLKMOD | INVERT_CLK | INVERT_LINE | INVERT_FRM |
PS16BPP | SINGLESCAN | TFT
LCDTIM1 = VFP | (VBP << 8) | (VPW << 16) | (VHDLY << 24)
LCDTIM2 = HBP | (HPW << 8) | (HFP << 21)
LCDFRMCFG = (HOZVAL << 21) | LINEVAL
LCDMVAL = 0
DMAFRMCFG = (7 << 24) + (640 * 480* 16) / 32;
.
6438F–ATARM–21-Jun-10

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